Tektronix AWG710, Programmer'S Manual

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Status and Event Reporting
3-8
AWG710 Arbitrary Waveform Generator Programmer Manual
This register holds the same content as the Questionable Condition Register
(QCR).
Enable Registers
There are four types of enable registers:
H
Event Status Enable Register (ESER)
H
Service Request Enable Register (SRER)
H
Operation Enable Register (OENR)
H
Questionable Enable Register (QENR)
Each bit in the enable registers corresponds to a bit in the controlling status
register. By setting and resetting the bits in the enable register, you can determine
whether or not events that occur will be registered to the status register and
queue.
The ESER is made up of bits defined exactly the same as bits 0 through 7 in the
SESR register (see Figure 3–6). You can use this register to designate whether or
not the SBR ESB bit should be set when an event has occurred, and to determine
if the corresponding SESR bit is set.
To set the SBR ESB bit (when the SESR bit has been set), set the ESER bit
corresponding to that event. To prevent the ESB bit from being set, reset the
ESER bit corresponding to that event.
Use the
*ESE
command to set the bits of the ESER. Use the
*ESE?
query to read
the contents of the ESER.
PON CME EXE DDE QYE OPC
7 6 5 4 3 2 1 0
Ċ Ċ
Figure 3-6: The Event Status Enable Register (ESER)
The SRER is made up of bits defined exactly the same as bits 0 through 7 in the
SBR (see Figure 3–7). You can use this register to define which events will
generate service requests.
The SRER bit 6 cannot be set. Also, the RQS is not maskable.
Questionable Event
Register (QEVR)
Event Status Enable
Register (ESER)
Service Request Enable
Register (SRER)