Tektronix AWG70001A, Technical Reference

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Speci fi cations
Table 1-18: Marker output (cont.)
Characteristics Description
Offset resolution 10 mV
DC accuracy (warranted)
±(10% of |output high or low setting| + 50 mV) into 50 Ω
External termination voltage range –2.8 V to +2.8 V
Rise/fall time < 35 ps (20% to 80% of swing) when High = 1.0 V, Low = 0 V
Output current ±28 mA maximum, assuming 1.4 V into 50 Ω load.
Delay from analog AWG70001A: 180 ps ±25 ps
AWG70001A Option AC: –380 ps ±25 ps
AWG70002A: 755 ps ±25 ps
Variable delay control Independent control for each marker
Range 0 to 100 ps
Resolution 1 ps
Accuracy ±15 ps
Skew between (+) and (-) outputs < 12 ps
Skew between M1 and M2 < 15 ps
Random jitter on clock pattern 0.4 ps rms (using 0101.. clock pattern) with Hi = 0.25 V, Low = –0.25 V
Total jitter on random pattern 20 ps
p-p
Using PRBS15 pattern, with Hi = 0.25 V, Low = –0.25 V
Measured at Bit Error Rate = 1e
-12
Aberrations
< ±33% p-p for the fi rst 100 ps following the step transition with 100% reference at 1 ns, for an
ambient temperature range of 20 ºC to 30 ºC.
Minimum pulse width 80 ps
A marker output can change logic states on any sample point. However it must remain in a
given logic state long enough to satisfy the minimum pulse width speci
fi cation.
Table 1-19: Clock output
Characteristics Description
The external clock output is a copy of an internal clock generator that is used to create the
DAC sample clock. This clock always operates in the octave range speci
fi ed below. It is
multiplied and divided to create the effective DAC sampling rate.
Connector type SMA on rear panel
Output impedance 50 Ω AC coupled
Output amplitude +5 dBm to +10 dBm
Frequency range 6.25 GHz to 12.5 GHz
AWG70000A Series and AWGSYNC01 Technical Reference 1–13