Supero X7DWU, User Manual

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X7DWU User's Manual
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Advanced Chipset Control
Access the submenu to make changes to the following settings.
Warning : Take caution when changing the Advanced settings. An incorrect
setting, a very high DRAM frequency or an incorrect DRAM timing may
cause the system to become unstable. When this occurs, reset the setting
to the default setting.
SERR Signal Condition
This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.
Clock Spectrum Feature
If Enabled, the BIOS will enable the Clock Spectrum feature in the clock generator
to help reduce the level of Electromagnetic Interference caused by the components
when needed. The options are Enabled and Disabled .
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Intel VT for Directed I/O
Select Enabled to bring up the following Intel VT for Directed I/O (VT-d) Confi gura-
tion submenu. The options are Enabled and Disabled.
VT-d for Port 0 (ESI)/VT-d for Port 1/VT-d for Port 5/VT-d for Port 9/
VT-d for DMI Port
Select Enabled to enable VT-d support for the port specifi ed through DRHD Struc-
tures in the ACPI Tables. The options are Disabled and Enabled.
Memory Voltage
This feature allows the user to set memory voltage for onboard memory modules.
Select auto to allow the BIOS to automatically detect the onboard memory voltage
according to the status of its SPD (Serial Presence Detect). Select 1.5V to force
the memory modules to run on 1.5V to accommodate lower-power FBDIMM (Fully
Buffered DIMM). Select 1.8V to force the memory module to run on 1.8 for testing.
The options are Auto , 1.5V, and 1.8V
Warning : If set to 1.8V, damage may occur to FBDIMM memory modules
that only support 1.5V.