Supero PDSLM, User Manual

Page: 33 / 81

Chapter 2: Installation
2-17
1 11
10 20
Pin 1: PWR LED (A)
Pin 2: PWR LED (A)
Pin 3: Ground
Pin 4: HDD LED (A)
Pin 5: HDD LED (C)
Pin 7: Message LED (A)
Pin 8: Message LED (C)
Pin 9: Error LED (A)
Pin 10: Error LED (C)
Pin 11: PWR Switch
Pin 12: Ground
Pin 13: Reset Switch
Pin 14: Ground
Pin 15: Non-Override PWR Switch
Pin 16: Ground
Pin 17: Ground
Pin 18: +5V Standby
(Reserved)
Pin 19: +3.3 Standby
(Reserved)
Pin 20: Beep
Pin 6: +3.3 Standby
(Reserved)
Non-Override PWR Switch
The Non-Override Power Switch con-
nection is located on pins 15 and 16
of JF1. Refer to the table on the right
for pin defi nitions.
System Beep
The System Beep connection is
located on pins 19 and 20 of JF1.
Refer to the table on the right for pin
defi nitions.
Non-Override PWR Switch
Pin Defi nitions (JF1)
Pin# Defi nition
15 Non-Override PWR Switch
16 Ground
System Beep
Pin Defi nitions (JF1)
Pin# Defi nition
19 P3V3SB
20 System Beep
A
B
A. System Beep
B. Non-Override PWR Switch
B-2. Front Control Panel Pin Defi nitions
JDIMM1
JS
P
K
R
1
JS2
JS1
JCMOS1
J17
FAN1
FAN2
DP1
J6
JDIMM2
J5
JIDE1
JF1
JCOM2
J12
J11
JPS1
4-Pin PWR
South Bridge
North Bridge
Audio
CTRL
mPGA478 SOCKET
PDSLM
SATA2
CPU
SO
-D
IMM
-A (D
IMM
S
lot 1)
IDE
COM-A&CRT
KB/MO
USE
CPU Fan
Chassis Fan
SATA0
COM-B
USB 2/3
SO-D
IM
M
-B (D
IM
M S
lot 2)
External PWR
Front Panel Control
Battery
BIOS
Buzzer
Super I/O
ICH7M
945GME
LAN
CTRL
Intel
Intel
Intel
J3
LAN/USB 0&1
J7
AUD
IO JAC
K
Line-Out J8
JPCI1
PCI 33MHZ