Chapter 6: UEFI BIOS
87
Chipset Configuration
Warning:
Setting the wrong values in the following features may cause the system to malfunc-
tion.
North Bridge
This feature allows the user to configure the settings for the Intel North Bridge.
UPI (
Ultra Path Interconnect)
Configuration
UPI Configuration
The following information will be displayed:
• Number of CPU
• Number of Active UPI Link
• Current UPI Link Speed
• Current UPI Link Frequency
• UPI Global MMIO Low Base/Limit
• UPI Global MMIO High Base/Limit
•
UPI Pci-e Configuration Base/Size
Degrade Precedence
Use this feature to select the degrading precedence option for Ultra Path Interconnect
(UPI) connections. Select Topology Precedent to degrade UPI features if system options
are in conflict. Select Feature Precedent to degrade UPI topology if system options are
in conflict. The options are
Topology Precedence
and Feature Precedence.
Link L0p Enable
Select Enable for the system BIOS to enable Link L0p support which will allow the CPU
to reduce the UPI links from full width to half width in the event when the CPU's workload
is low in an attempt to save power. This feature is available for the system that uses Intel
processors with UPI technology support. The options are Disable, Enable, and
Auto
.
Note:
You can change the performance settings for non-standard applications by us-
ing this parameter. It is recommended that the default settings be used for standard
applications.
Link L1 Enable
Select Enable for the BIOS to activate Link L1 support which will power down the UPI links
to save power when the system is idle. This feature is available for the system that uses
Intel processors with UPI technology support. The options are Disable, Enable, and
Auto
.
Note:
Link L1 is an excellent feature for an idle system. L1 is used during Package
C-States when its latency is hidden by other components during a wakeup.
