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1 Intro

Electrocardiogram (

Ecg

) Signals

The Electrocardiogram (

Ecg

)

•

Ecg

: electrical manifestation of heart activity recorded

from the body surface

•

monitoring of heart rate

The

Ecg

signal can be recorded fairly easily with surface

electrodes placed on the limbs and/or the chest, see pages

–

below.

Josef Goette

2009

2 System Description

2.4.3 Memory Map

The memory map shows how the memory in the STM32F103RB is configured. This needs to be
known for programming the processor.

STM32F103x8, STM32F103xB

Memory mapping

Doc ID 13587 Rev 10

31/91

4 Memory

mapping

The memory map is shown in

Figure 9

Figure 9.

Memory map

reserved

0x4000 0000

0x4000 0400

0x4000 0800

0x4000 0C00

0x4000 2800

0x4000 2C00

0x4000 3000

0x4000 3400

0x4000 3800

0x4000 3C00

0x4000 4400

0x4000 4800

0x4000 4C00

0x4001 0C00

0x4001 1000

0x4001 1400

0x4001 1800

0x4002 1400

APB memory space

DMA

0x4002 1000

TIM2

Reserved

0x4001 0800

0x4001 1C00

0x4001 2400

0x4001 2800

0x4001 2C00

0x4001 3000

0x4001 3400

0x4001 3800

TIM3

TIM4

reserved

RTC

WWDG

IWDG

reserved

SPI2

USART2

USART3

AFIO

Port A

Port C

Port D

rese rve d

ADC1

reserved

USART1

reserved

0x4002 0400

0x4002 0000

0x4001 3C00

0x4000 5400

0x4000 5800

reserved

ADC2

TIM1

SPI1

reserved

I2C1

BKP

0x4000 6000

0x4000 5C00

Por t E

PWR

Port B

I2C2

reserved

bxCAN

EXTI

reserved

RCC

reserved

Flash Interf ace

reserved

0x4000 6400

0x4000 6800

0x4000 6C00

0x4000 7000

0x4000 7400

0x4001 0000

0x4001 0400

0x4002 2000

0x4002 2400

0x4002 3000

0x4002 3400

0x6000 0000

0xE010 0000

reserved

0xFFFF FFFF

USB Reg isters

CRC

0x2000 0000

0x4000 0000

0x6000 0000

0x8000 0000

0xA000 0000

0xC000 0000

0xE000 0000

0xFFFF FFFF

0x0000 0000

Peripherals

SRAM

Flash memory

rese rved

0x0800 0000

0x0801 FFFF

0x1FFF F000

0x1FFF FFFF

System memory

Option Bytes

0x1FFF F800

0x1FFF F80F

Cortex- M3 Internal

Peripherals

0xE010 0000

ai14394f

shared 512 byte

USB/CAN SRAM

Aliased to Flash or system
memory depending on
BOOT pins

0x0000 0000

Figure 2.2:

STM32F103xx memory map

•

Flash Memory: 0x0800 0000 - 0x0801 FFFF

•

System Memory: 0x1FFF F000 - 0x1FFF F800

STM32 Cortex-M3 Tutorial

Summary of Contents for STM32 Cortex-M3

Page 1: ...heart rate The Ecg signal can be recorded fairly ea electrodes placed on the limbs and or the ches below Tutorial STM32 Cortex M3 Author El Ing Lukas Kohler Adviser Daniel Debrunner Date 09 09 2009 S...

Page 2: ......

Page 3: ...odel which is able to replace the available 8 and 16 bit microcontroller Tools and libraries guarantee a short developing time and a high standardisation A big part of written and used software can be...

Page 4: ......

Page 5: ...2 4 3 Memory Map 8 2 4 4 Interfaces 9 2 5 Development Boards 9 2 5 1 STM32H103 from Olimex 9 2 5 2 STM32P103 from Olimex 10 2 5 3 Setup for Developing 10 2 5 4 Board Layout and Schematic 11 2 5 5 BFH...

Page 6: ...ccess 25 4 5 General Purpose Input Output GPIO 26 4 5 1 Configuration 26 4 5 2 Driver 27 4 5 3 Set Output 27 4 5 4 Read Input 27 4 6 Serial Interface USART 28 4 6 1 Ways of Operation Polling versus In...

Page 7: ...Ecg signal can b electrodes placed on the l below Josef Goette 4 15 2 Communication Protocol 42 4 15 3 Pinning 44 4 16 Serial Peripheral Interface SPI 45 4 16 1 Physical Layer 45 4 16 2 Communication...

Page 8: ......

Page 9: ...oftware Development Kit Vision3 and how to compile simulate download and debug software Peripherals Chapter 4 The biggest part of this documentation is showing how the peripherals are controlled Ex am...

Page 10: ...surface electrodes placed on the limbs and or the chest see pages 6 16 below Josef Goette 2 2009 1 Introduction 1 4 License and Author The whole Cortex M3 Tutorial including Source Code and Documenta...

Page 11: ...it Electrostatic discharges may destroy any electronic circuit 2 3 Cortex M3 Core The target market of the Cortex M3 core is the field that has been served by 8 or 16bit controllers In this market che...

Page 12: ...es that allow it to perform operations in parallel The architecture inside the Cortex M3 is a ARMv7 M RISC processor With only 33 000 logic cells needed to syntetisize the M3 core it is the smallest c...

Page 13: ...ed The Core exists as well for VHDL implementation as M1 ARM 32 bit Cortex M3 CPU only core without peripherals The peripherals are implemented by the manufacturers Power Consumption The STM32 is a lo...

Page 14: ...ance real time behavior A lot of peripherals Outstanding power efficiency In production since 2007 7 proved design 70 part numbers across 4 product lines SW Libraries are free available from www st co...

Page 15: ...6 MHz XTAL 32 kHz OSC_IN OSC_OUT OSC32_OUT OSC32_IN PLL APB1 F max 24 36 MHz PCLK1 HCLK CLOCK MANAGT PCLK2 as AF as AF Flash 128 KB VOLT REG 3 3V TO 1 8V POWER Backu p interface as AF TIM 4 BusM atrix...

Page 16: ...x4001 3000 0x4001 3400 0x4001 3800 TIM3 TIM4 reserved RTC WWDG IWDG reserved SPI2 USART2 USART3 AFIO Port A Port C Port D reserved ADC1 reserved USART1 reserved 0x4002 0400 0x4002 0000 0x4001 3C00 0x4...

Page 17: ...ces can be used to communicate with any kind of devices or can be used as debug status interface 2 5 Development Boards We use the Olimex boards with our own BFH mother board extension On both of thes...

Page 18: ...sions 100x90mm 2 5 3 Setup for Developing In order to be able to develop software for the STM32F103RB Keil Vision3 has to be installed on a PC If this is not yet the case install it according to Chapt...

Page 19: ...ard the Olimex STM32H103 board is mounted on The mother board has a power supply and drivers for interfaces The mother board uses the power supply form the STM32H103 board Just connect the STM32H103 w...

Page 20: ...fairly easily with surface electrodes placed on the limbs and or the chest see pages 6 16 below Josef Goette 2 2009 2 System Description 1 CAN Rx PB8 Tx PB9 if J1 and J3 are set Resister on J6 see Fi...

Page 21: ...M32 Peripheral Library ST offers a free ARM based 32 bit MCU STM32F10xxx standard peripheral library for program mers This can be downloaded from www st com Direct Link STM32F10x StdPeriph Lib This li...

Page 22: ...e library into the new folder Rename renameMe c to gpio c gpio c This will be the main file STM32 Init c and STM32 Init h Configuration files for the STM32 processor STM32 Reg h Register file with def...

Page 23: ...onfig ure the processor Double click STM32 Init c and select Configuration Wizard Figure 3 4 We need the Clock Configuration and the General purpose I O Configuration to be checked In the Clock Config...

Page 24: ...target files This will assemble STM32F10x s and generate an object file o and its listing report lst according to Figure 3 6 The c files are compiled and object file o generated The linker then puts t...

Page 25: ...ng that you are using the evaluation mode Click OK and open the GPIOB port with Peripherals 7 General Purpose I O 7 GPIOB Figure 3 7 shows the debug mode In the top left corner the simulation is handl...

Page 26: ...o p I n t o O v e r O u t S t a r t S t o p D e b u g S e s s i o n Simulation Step R u n t o C u r s o r l i n e Figure 3 7 Debug Mode 3 7 1 Window update ate selectThe peripherals are updated when a...

Page 27: ...lready know the appearing window Now click on New Project Target name it STM32H103 and click OK Select now the created target on the left side of the icon 1 Klick now on the icon 2 according to Figure...

Page 28: ...h surface electrodes placed on the limbs and or the chest see pages 6 16 below Josef Goette 2 2009 3 Keil SDK Figure 3 11 Options for Target Figure 3 12 Options for Debug Figure 3 13 Options for Debug...

Page 29: ...supply is removed Our program will count up on GPIOB Connect therefore the J24 with PB8 J25 with PB9 J28 PB10 J29 PB11 If you connect a LED to PB0 you won t see anything since the switching frequency...

Page 30: ...e is very important that other users of the code are able to understand it In this documentation Doxygen has been used Listing 3 2 shows the used commands for Doxygen After running Doxygen a html help...

Page 31: ...stm32f10x stdperiph lib Project STM32F10x StdPeriph Examples Insider s Guide from Hitex CD datasheet hitex guide STM32 Gives a general introduction to the STM32F103RB processor More help can be found...

Page 32: ...ary files are located at C Keil ARM RV31 LIB ST STM32F10x and should be added by the Keil project in the folder lib 2 Add include stm32f10x_PERIPHERAL h at the begin of your main file where PE RIPHERA...

Page 33: ...register access Instead of using the FwLib the registers can be accessed directly The properties then are set with Listing 4 3 Setting the GPIO Register by direct access Set up the GPIO r e g i s t e...

Page 34: ...ove the lit LED S1 moves the lit LED to the right S2 to the left 4 5 1 Configuration The configuration is done with the Settings Wizard see Chapter 3 5 2 for more information shown in Figure 4 1 GPIOA...

Page 35: ...chip peripheral Output control Analog Input on off on off I O pin VDD VDD VSS VSS TTL Schmitt trigger VSS VDD Protection diode Protection diode on off Input driver Output driver P MOS N MOS Read Bit s...

Page 36: ...ts sender 9600Baud b usart4 F sends periodically the string Hello World with 115200Baud to its host using printf b usartIrq1 F the data and sends them back to its sender 9600Baud uses IRQ 4 6 1 Ways o...

Page 37: ...e with the Settings Wizard shown in Figure 4 4 The function void USART2 IRQHandler void is called when an interrupt configured in the Settings Wizard occurs Refer to the example usartIrq1 for more inf...

Page 38: ...gister RDR Receive Shift Register Read Transmit Data Register TDR Transmit Shift Register Write SW_RX TX DATA REGISTER DR TRANSMITTER CLOCK RECEIVER CLOCK RECEIVER RATE TRANSMITTER RATE fPCLKx x 1 2 C...

Page 39: ...its 1 stop bit and 1 parity Figure 4 7 USART Serial Protocol 4 6 5 Pinning USART1 Default Wire GPIO Pin CK PA8 41 TX PA9 42 RX PA10 43 CTS PA11 44 RTS PA12 45 Remapped Wire GPIO Pin CK TX PB6 58 RX PB...

Page 40: ...terrupt This is intended to provide a standard timer for all Cortex based microcontrollers The SysTick timer is intended to be used to provide a system tick for an RTOS or to generate a periodic inter...

Page 41: ...DAC and are able to drive it through their trigger outputs Advanced control timers TIM1 and TIM8 It may be used for a variety of purposes in cluding measuring the pulse lengths of input signals input...

Page 42: ...hest see pages 6 16 below Josef Goette 2 2009 4 Peripherals 4 9 Pulse Width Modulation PWM b pwm1 F Lets PB8 blink with 1Hz 50 duty cycle and PB9 with 25 using the PWM function of the timer TIM4 b pwm...

Page 43: ...ple mentation differed between manufacturers Since the interrupt scheme is implemented in the Cortex M3 core the way of operating is for all microcontroller s using this core equal 4 10 1 Configuratio...

Page 44: ...atchdog will reset the CPU Figure 4 12 Watchdog Configuration Wizard 4 12 Real Time Clock RTC b rtc1 F RTC is configured to generate a second and an alarm interrupt which turns a LED on b rtc2 F 24h c...

Page 45: ...d RTC IRQHandler 4 13 Analog to Digital Converter ADC b ad1 F reads the values and writes them on the serial interface 115200Baud 4 13 1 Conversion Modes The AD converters of the STM32F103RB can opera...

Page 46: ...nalog Digital converter PC1 ADC Channel10 i s used as analog input void adc Init void 65 RCC APB2ENR RCC APB2ENR ADC1EN enable peripheral clock for ADC1 ADC1 SQR1 0x00000000 only one conversion ADC1 S...

Page 47: ...Threshold 12 bits Flags enable bits EOC AWD Analog watchdog event VDDA VSSA VREF VREF Interrupt TIM1_CH2 TIM1_CH3 TIM2_CH2 TIM3_CH4 From ADC prescaler 16 bits End of conversion channels Injected chan...

Page 48: ...for data transmission and reception and so they cannot be used concurrently the shared SRAM is accessed through CAN and USB exclusively The USB and CAN can be used in the same application but not at t...

Page 49: ...ces which can operate in multimaster and slave modes They can support standard and fast modes They support dual slave addressing 7 bit only and both 7 10 bit addressing in master mode A hardware CRC g...

Page 50: ...1 Physical layer I2C Definitions Data can only be transmitted when the bus is not active As long as the clock is high the data line is not allowed to change 5 When no data are transmitted SCL and SDA...

Page 51: ...ord address and each data byte Figure 16 WRITE Mode Sequence AI00895 BUS ACTIVITY ACK S ACK ACK ACK NO ACK STOP START P SDA LINE BUS ACTIVITY MASTER R W DATA n DATA n 1 DATA n X SLAVE ADDRESS AI00591...

Page 52: ...l can be recorded fairly easily with surface electrodes placed on the limbs and or the chest see pages 6 16 below Josef Goette 2 2009 4 Peripherals 4 15 3 Pinning Both wires SCL and SDA are open colle...

Page 53: ...directions Therefore following wires are required SCK Clock generated by the master MISO Master in Slave out MOSI Master out Slave in NPCK or NSS Chip select for the slave this wire is not generated b...

Page 54: ...aster mode and receive data in slave mode SCK Serial Clock output for SPI masters and input for SPI slaves NSS Slave select This is an optional pin to select master slave mode This pin acts as a chip...

Page 55: ...ster Each data frame is 8 or 16 bits long depending on the size of the data programmed using the DFF bit in the SPI_CR1 register The selected data frame format is applicable for transmission and or re...

Page 56: ...Universal Serial Bus USB The STM32F103RB embeds a full speed USB 12 Mbs device peripheral compatible with the USB It has software configurable endpoint setting and suspend resume support The dedicated...

Page 57: ...ptions for Output 19 3 9 Options for Listing 19 3 10 Options for Linker 19 3 11 Options for Target 20 3 12 Options for Debug 20 3 13 Options for Debug Settings 20 3 14 Options for Utilities 20 3 15 Op...

Page 58: ...and or the chest see pages 6 16 below Josef Goette 2 2009 List of Figures 4 16 CAN Analyzer Software 41 4 17 I2C Wiring 42 4 18 I2C Communication Protocol 42 4 19 I2C ACK Sequence 43 4 20 I2C data tra...

Page 59: ...erty 5 IRQ Interrupt Request 35 ISR Interrupt Service Routine 35 JTAG Debug Interface 9 LED Light Emitting Diode 9 NVIC Nested Vector Interrupt Controller 4 PWM Pulse Width Modulation 34 RS232 Serial...

Page 60: ...the body surface monitoring of heart rate The Ecg signal can be recorded fairly easily with surface electrodes placed on the limbs and or the chest see pages 6 16 below Josef Goette 2 2009 Glossary U...

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