4.16 Serial Peripheral Interface (SPI)
1 Intro
2
Electrocardiogram (
Ecg
) Signals
The Electrocardiogram (
Ecg
)
•
Ecg
: electrical manifestation of heart activity recorded
from the body surface
•
monitoring of heart rate
The
Ecg
signal can be recorded fairly easily with surface
electrodes placed on the limbs and/or the chest, see pages
6
–
16
below.
Josef Goette
2
2009
Serial peripheral interface (SPI)
RM0008
592/995
Doc ID 13902 Rev 9
Figure 210. Data clock timing diagram
1.
These timings are shown with the LSBFIRST bit reset in the SPI_CR1 register.
Data frame format
Data can be shifted out either MSB-first or LSB-first depending on the value of the
LSBFIRST bit in the SPI_CR1 Register.
Each data frame is 8 or 16 bits long depending on the size of the data programmed using
the DFF bit in the SPI_CR1 register. The selected data frame format is applicable for
transmission and/or reception.
CPOL = 1
CPOL = 0
MSBit
LSBit
MSBit
LSBit
MISO
(from master)
MOSI
(from slave)
NSS
(to slave)
Capture strobe
CPHA =1
CPOL = 1
CPOL = 0
MSBit
LSBit
MSBit
LSBit
MISO
(from master)
MOSI
NSS
(to slave)
Capture strobe
CPHA =0
Note:
These timings are shown with the LSBFIRST bit reset in the SPI_CR1 register.
(from slave)
8 or 16 bits depending on Data Frame Format (see SPI_CR1)
8 or 16 bits depending on Data Frame Format (see SPI_CR1)
Figure 4.25:
SPI data communication between Master and Slave
Lukas Kohler
47
