2.3 Cortex-M3 Core
1 Intro
2
Electrocardiogram (
Ecg
) Signals
The Electrocardiogram (
Ecg
)
•
Ecg
: electrical manifestation of heart activity recorded
from the body surface
•
monitoring of heart rate
The
Ecg
signal can be recorded fairly easily with surface
electrodes placed on the limbs and/or the chest, see pages
6
–
16
below.
Josef Goette
2
2009
Cortex CPU
The heart of the Cortex core is a 32-bit RISC CPU. This CPU has a simplified version of the
ARM7/9 programmer’s model, but a richer instruction set with good integer maths support, bet-
ter bit manipulation and ’harder’ real-time performance has been added.
Pipeline
The Cortex CPU can execute most instructions in a single cycle. Like the ARM7 and ARM9 CPUs
this is achieved with a three stage pipeline. Whilst one instruction is being executed, the next is
being decoded and a third is being fetched from memory.
Multiplication
A 32-bit multiplication can be done within one cycle since the Cortex-M3 offers a hardware mul-
tiplication unit.
Producer
The IP core form ARM can be implemented by different manufacturers. In this document only
the STM32F103RB from ST is described. The Core exists as well for VHDL implementation as M1
ARM 32-bit Cortex-M3 CPU only core without peripherals. The peripherals are implemented by
the manufacturers.
Power Consumption
The STM32 is a low power as well as high performance microcontroller . It can run from a 2V
supply and at 72MHz with everything switched on it consumes just 36mA. In combination with
the Cortex low power modes the STM32 has a standby power consumption of only 2
µ
A.
Startup-Code
For the Cortex-M3 is no longer assembler startup code is needed, everything can be coded in C.
Debug-Interface
The debug interface has been changed to a scalable interface with advantages according to the
ARM7/9 family. The Cortex-M3 has a
Debug Access Port
(DAP) which can be used in the JTAG or
in the Serial Wire Debug Mode with only two lines (clock and data).
ARM7 processors have only a very limited amount of two
Hardware-Breakpoints
. In the Cortex-M3
this has been updated to 8 breakpoints. Beside the breakpoints,
Fault Conditions
and
Exceptions
can be set.
Faults and Exceptions
can be supervised without the need of using breakpoints.
The debug interface works as well in the Sleep-mode.
Lukas Kohler
5