Stanford Research Systems SR830, Manual

Page: 151 / 177

7-8
Circuit Description
a rate of 256 kHz. One channel is dedicated to the
input signal. The other channel reads one of the
Aux A/D inputs. The Aux inputs are multiplexed so
that each input is read every four cycles. The two
digital output streams are buffered by U406 and
sent to the DSP board.
I/O INTERFACE
The Analog Input Board communicates with the
CPU Board via its I/O Interface. U504 and U506
are simple latches which hold configuration data
for the analog board. They are written via the iso-
lated data bus from the DSP board. This data bus
is active only when the Analog board is
addressed. This prevents noise from the CPU and
DSP boards from entering the Analog Board.
Timing signals for the A/D Converter are buffered
by U406.
POWER
Several voltages are generated on the Analog
Input Board locally. ±15V is generated for most of
the analog IC's. A dedicated ±15V supply is also
generated for the front-end amplifier. ±5.6V is gen-
erated for the digital circuitry as well as some of
the drivers. The A/D Converter has its own ±5V
supply.