Stanford Research Systems SR830 Manual Download Page 135

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6-18

Performance Tests

d) Press

[Freq]

Use the knob to set the internal oscillator frequency to the value in the table.

e) Wait for the R reading to stabilize. Record the value of R.

f) Repeat steps 4d and 4e for all of the frequencies listed.

5) This completes the sine output amplitude accuracy and frequency response test. Enter the results of

this test in the test record at the end of this section.

Summary of Contents for SR830

Page 1: ...SP Lock In Amplifier 1290 D Reamwood Avenue Sunnyvale California 94089 Phone 408 744 9040 Fax 408 744 9049 email info thinkSRS com www thinkSRS com Copyright 1993 by SRS Inc All Rights Reserved Revisi...

Page 2: ...4 1 Spin Knob 4 1 Front Panel BNC Connectors 4 2 Key Click On Off 4 2 Front Panel Display Test 4 2 Display Off Operation 4 2 Keypad Test 4 3 Standard Settings 4 4 FRONT PANEL Signal Input and Filters...

Page 3: ...Amplitude Accuracy and Flatness 6 9 Amplitude Linearity 6 11 Frequency Accuracy 6 13 Phase Accuracy 6 15 Sine Output Amplitude 6 17 DC Outputs and Inputs 6 19 Input Noise 6 21 Performance Test Record...

Page 4: ...osition and insert the correct fuse into the fuse holder LINE FUSE Verify that the correct line fuse is installed before connecting the line cord For 100V 120V use a 1 Amp fuse and for 220V 240V use a...

Page 5: ...1 4...

Page 6: ...100 ms 12 dB oct Internal reference crystal synthesized 0 0001 rms at 1 kHz Phase Drift 0 01 C below 10 kHz 0 1 C to 100 kHz Harmonic Detect Detect at Nxf where N 19999 and Nxf 102 kHz Acquisition Ti...

Page 7: ...ND OUTPUTS Channel 1 Output Output proportional to Channel 1 display or X Output Voltage 10 V full scale 10 mA max output current Channel 2 Output Output proportional to Channel 2 display or Y Output...

Page 8: ...19 OFSL i 5 6 Set Query the Low Pass Filter Slope to 6 0 12 1 18 2 or 24 3 dB oct SYNC i 5 7 Set Query the Synchronous Filter to Off 0 or On below 200 Hz 1 DISPLAY and OUTPUT page description DDEF i j...

Page 9: ...rface STRD 5 18 Start a scan after 0 5sec delay Use with Fast Data Transfer Mode INTERFACE page description RST 5 19 Reset the unit to its default configurations IDN 5 19 Read the SR830 device identif...

Page 10: ...mand is received 6 URQ Set by any key press or knob rotation 7 PON Set by power on LIA STATUS BYTE 5 23 bit name usage 0 RSRV INPT Set when on RESERVE or INPUT overload 1 FILTR Set when on FILTR overl...

Page 11: ...SR830 DSP Lock In Amplifier 1 10...

Page 12: ...is highly recommended that the first time user step through some or all of these exercises before attempting to perform an actual experiment The experimental procedures are detailed in two columns The...

Page 13: ...2 2 Getting Started...

Page 14: ...The lock in defaults to the internal oscillator refer ence set at 1 000 kHz The reference mode is indi cated by the INTERNAL led In this mode the lock in generates a synchronous sine output at the int...

Page 15: ...hould stay within 1 of 1 V and the phase shift should stay close to zero the value of Y should stay close to zero The internal oscillator is crystal synthesized with 25 ppm of frequency error The freq...

Page 16: ...leave the filtering short and the outputs noisy for now Show the internal reference frequency on the Reference display At a reference frequency of 55 Hz and a 6 db oct 3 ms time constant the output is...

Page 17: ...2 6 The Basic Lock in...

Page 18: ...y pressed the lock in returns to its standard set tings See the Standard Settings list in the Operation section for a complete listing of the settings The Channel 1 display shows X and Channel 2 shows...

Page 19: ...tor to the signal frequency and the phase will be a constant Select external reference mode The lock in will phase lock to the signal at the Reference Input With a TTL reference signal the slope needs...

Page 20: ...the settings The Channel 1 display shows X and Channel 2 shows Y The lock in defaults to the internal oscillator refer ence set at 1 000 kHz The reference mode is indi cated by the INTERNAL led In th...

Page 21: ...The CH1 output voltage should be zero in this case The Offset indicator turns on at the bottom of the Channel 1 display to indicate that the displayed quantity is affected by an offset Show the Chann...

Page 22: ...OTE Outputs proportional to X and Y rear panel CH1 or CH2 have 100 kHz of bandwidth The CH1 and CH2 outputs when configured to be proportional to the displays even if the display is X or Y are updated...

Page 23: ...2 12 Outputs Offsets and Expands...

Page 24: ...lt setup Now let s recall the lock in setup that we just saved Check that the sensitivity and time constant are 1V and 100 ms default values The Reference display shows the setup number The knob selec...

Page 25: ...2 14 Storing and Recalling Setups...

Page 26: ...ect the DVM from Aux Out 1 Connect AuxOut 1 to Aux In 1 on the rear panel When the power is turned on with the Setup key pressed the lock in returns to its standard set tings See the Standard Settings...

Page 27: ...ux In 3 The Channel 1 and 2 displays may be ratio ed to the Aux Input voltages See the Basics section for more about output scaling The displays may be stored in the internal data buffers at a program...

Page 28: ...kHz with a bandwidth as narrow as 0 01 Hz In this case the noise in the detection bandwidth will be only 0 5 V 5 nV Hz x 01 Hz x 1000 while the signal is still 10 V The signal to noise ratio is now 2...

Page 29: ...ks the external reference changes in the external reference frequency do not affect the measurement All lock in measurements require a reference signal In this case the reference is provided by the ex...

Page 30: ...phases A 2V pk pk square wave can be expressed as S t 1 273sin t 0 4244sin 3 t 0 2546sin 5 t where 2 f The SR830 locked to f will single out the first component The measured signal will be 1 273sin t...

Page 31: ...3 4 SR830 Basics...

Page 32: ...k description THE FUNCTIONAL SR830 Phase Sensitive Detector PLL I A B Low Noise Differential Amp Voltage Current 50 60 Hz Notch Filter Reference In Sine or TTL Phase Shifter DC Gain Offset Expand Gain...

Page 33: ...3 6 SR830 Basics...

Page 34: ...the SINE OUT BNC on the front panel The amplitude of this output may be set from 4 mV to 5 V REFERENCE CHANNEL When an external reference is used this internal oscillator sine wave is phase locked to...

Page 35: ...ose to the reference being detected Noise at nearby frequencies now appears near DC and affects the lock in output Phase noise in the SR830 is very low and general ly causes no problems In application...

Page 36: ...rs The dynamic reserve of an analog PSD is limited to about 60 dB When there is a large noise signal present 1000 times or 60 dB greater than the full scale signal the analog PSD measures the signal w...

Page 37: ...3 10 SR830 Basics...

Page 38: ...rs in many ways First analog lock ins provide at most two TIME CONSTANTS and DC GAIN stages of filtering with a maximum roll off of 12 dB oct This limitation is usually due to space and expense Each f...

Page 39: ...f the DC amplifier needs to be on the order of 10 V in order to not affect the measurement If the dynamic reserve is increased to 80dB then this offset needs to be 10 times smaller still This is one o...

Page 40: ...ts when configured to output X or Y When the CH1 or CH2 outputs are proportional to a display which is simply defined as X Y or R the output scale is also 10 V full scale Lock in amplifiers are design...

Page 41: ...ed to calculate the displayed value For example CH1 when display ing X does not increase its displayed value when X is expanded This is because the expand func tion increases the resolution with which...

Page 42: ...ement accuracy Because the errors are DC in nature increasing the time con stant does not help Most lock ins define tolerable noise as noise levels which do not affect the output more than a few perce...

Page 43: ...output noise may become detectable at ultra high reserves In this case simply lower the dynamic reserve and the DC gain will decrease and the output noise will decrease also In general do not run wit...

Page 44: ...and filter roll off For exam ple suppose the SR830 is set to 5 V full scale SIGNAL INPUT AMPLIFIER and FILTERS with a 100 ms time constant and 6 dB oct of filter roll off The ENBW of a 100 ms 6 dB oct...

Page 45: ...hese signals would violate the Nyquist criterion and be undersampled The result of this under sampling is to make these higher frequency sig nals appear as lower frequencies in the digital data stream...

Page 46: ...the 100 dB CMRR of the lock in input but noise on only the shield is not rejected at all Differential Voltage Connection A B The second method of connection is the differen tial mode The lock in measu...

Page 47: ...providing enough signal for the lock in to measure Which current gain should you use The current gain determines the input current noise of the lock in as well as its measurement bandwidth Signals fa...

Page 48: ...ed to reach 99 of its final value T Time Constant Slope ENBW Wait Time 6 dB oct 1 4T 5T 12 dB oct 1 8T 7T 18 dB oct 3 32T 9T 24 dB oct 5 64T 10T The signal amplifier bandwidth determines the amount of...

Page 49: ...Other sources of 1 f noise include noise found in vacuum tubes and semiconductors Total noise All of these noise sources are incoherent The total random noise is the square root of the sum of the squ...

Page 50: ...uency Vnoise is the noise amplitude and Cstray is the stray capacitance For example if the noise source is a power circuit then f 60 Hz and V noise 120 V Cstray can be estimated using a parallel plate...

Page 51: ...rophonic effects Physical changes in the experiment or cables due to vibrations for example can result in electrical noise over the entire frequency range of the lock in For example consider a coaxial...

Page 52: ...puted This is the mean value of X over some past history The present mean value of X is subtracted from the present value of X to find the deviation of X from the mean Finally the moving average of th...

Page 53: ...3 26 SR830 Basics...

Page 54: ...ecks the processor ROM DSP Checks the digital signal processor DSP rCAL If the backup memory check passes then the instrument returns to the settings in effect when the power was last turned off User...

Page 55: ...ine wave is phase locked to the reference and its amplitude is programmable A TTL sync output is provided on the rear panel This output is useful for triggering scopes and other equipment at the refer...

Page 56: ...ll off with the Phase key Keypad Test To test the keypad press the Phase and Ampl keys together The CH1 and CH2 displays will read PAd codE and a number of LED indica tors will be turned on The LED s...

Page 57: ...is turned on the lock in settings will be set to the defaults shown below rather than the settings that were in effect when the power was last turned off The default set tings may also be recalled usi...

Page 58: ...current gain determines the input current noise as well as the input bandwidth The 100 M gain has 10 times lower noise but 100 times lower bandwidth Make sure that the signal frequency is below the in...

Page 59: ...ce is used This also results in phase errors at low frequencies Ground This key chooses the shield grounding configuration The shields of the input connectors A and B are not connected directly to the...

Page 60: ...AIN key will automatically adjust the sensitivity based upon the detected signal magnitude R Auto Gain may take a long time if the time constant is very long If the time constant is greater than 1 sec...

Page 61: ...e SR830 Basics section for more information Auto Reserve Pressing AUTO RESERVE will change the reserve mode to the mini mum reserve required Auto Reserve will not work if there are low fre quency nois...

Page 62: ...and gains 6 dB oct DC gain dB min time constant 45 10 s 55 30 s 65 100 s 75 300 s 85 1 ms 95 3 ms 105 10 ms 115 30 ms 125 100 ms 135 300 ms 145 1 s 155 3 s 165 10 s 175 30 s 12 dB oct DC gain dB min t...

Page 63: ...ven if X or Y is displayed are updated at a 512 Hz rate These outputs do not accurately reflect high frequency out puts Slope oct This key selects the low pass filter slope number of poles Each pole c...

Page 64: ...the aver age over the previous 128 slots is computed and output This results in an output rate of 128xf This output is then smoothed by the two poles of filtering which follow the synchronous filter...

Page 65: ...an 1 09 times full scale This can occur if the sensitivi ty is too low or if the output is expanded such that the output voltage would exceed 10V AUTO This indicator is turned while an auto function i...

Page 66: ...tor from 1 10 or 100 Output offsets ARE reflected in displays which depend upon X or R X and Y offsets do NOT affect the calculation of R and Output expands do NOT increase the displayed values of X o...

Page 67: ...utput can never exceed full scale when expanded For example if an output is 10 of full scale the largest expand with no offset which does not overload is 10 An output expanded beyond full scale will b...

Page 68: ...imes full scale This can occur if the sensitivi ty is too low or if the output is expanded such that the output voltage would exceed 10V AUTO This indicator is turned while an auto function is in prog...

Page 69: ...and Y offsets do NOT affect the calculation of R or Y Output expand does NOT increase the displayed value Y Expand increases the display resolution If the display is showing a quantity which is affect...

Page 70: ...scale the largest expand with no offset which does not overload is 10 An output expanded beyond full scale will be overloaded Short Time Constant Limitations A short time constant places a limit on th...

Page 71: ...e digital sine wave used by the PSD in either internal or external reference mode Changing this phase shift only shifts internal sine waves The effect of this phase shift can only be seen at the lock...

Page 72: ...with 2 mV resolution The output impedance of the Sine Out is 50 If the signal is terminated in 50 the amplitude will be half of the programmed value When the reference mode is internal this is the exc...

Page 73: ...s used as the reference The Reference Input BNC is ignored in this case In this mode the Sine Out or TTL Sync Out provides the excitation for the measurement Use the Freq key to display and adjust the...

Page 74: ......

Page 75: ...3 Adjust the time constant and roll off until there is no Time Constant overload 4 Press AUTO PHASE if desired 5 Repeat if necessary At very low frequencies the auto functions may not function proper...

Page 76: ...fer number Press Recall again to recall the setup in the buffer or any other key to abort the recall process When a setup is recalled any data presently in the data buffer is lost The message rcal n d...

Page 77: ...knob to select GPIB or RS232 ADDRESS Setup ADDRESS displays the GPIB address Use the knob to select an address from 0 to 30 BAUD Setup BAUD displays the RS232 baud rate Use the knob to adjust the bau...

Page 78: ...t is allowed The REMOTE indicator is on above the Local key To return to front panel operation press the Local key REMOTE This led is on when the front panel is locked out by a computer interface No f...

Page 79: ...nsitivities from 20 nA to 1 A require 1 M current gain tc chnG TC CHANGE Indicates that the time constant has been changed either by increasing the detection frequency from below 200 Hz to above 200 H...

Page 80: ...able AUX IN 1 4 A D Inputs These are auxiliary analog inputs which can be digitized by the SR830 The range is 10 5V to 10 5V and the resolution is 16 bits 1 3 mV The input impedance is 1 M These input...

Page 81: ...verloads and the effects of prefiltering However because the analog gain never exceeds 2000 very small signals may not be amplified enough to viewed at the monitor output TRIG IN This TTL input may be...

Page 82: ...se A B as the input configuration Be sure to twist the A and B cables so that there is no differential noise pickup between the cables The SR550 and SR552 are AC coupled from 1 Hz to 100 kHz Set the S...

Page 83: ...4 30 Rear Panel...

Page 84: ...e cleared and an error reported The present value of a particular parameter may INTRODUCTION The SR830 DSP Lock in Amplifier may be remote ly programmed via either the RS232 or GPIB IEEE 488 interface...

Page 85: ...IB serial polling will generate a response while a command is in progress When the command execution terminates the Interface Ready bit is set again and new commands will be processed Since most comma...

Page 86: ...mmands that may ONLY be queried have a after the mnemonic Commands that MAY NOT be queried have no Do not send or as part of the command The variables are defined as follows i j k l m integers x y z r...

Page 87: ...Hz The value of f will be rounded to 5 digits or 0 0001 Hz whichever is greater The value of f is limited to 0 001 f 102000 If the harmonic number is greater than 1 then the frequency is limited to nx...

Page 88: ...A automatically select the 1 M current gain At sensitivities below 20 nA changing the sensitivity does not change the current gain IGND i The IGND command sets or queries the input shield grounding T...

Page 89: ...n of the Reserve key for the actual reserves for each sensitivity OFLT i The OFLT command sets or queries the time constant The parameter i selects a time constant below i time constant i time constan...

Page 90: ...mmand sets or queries the synchronous filter status The parameter i selects Off i 0 or synchronous filtering below 200 Hz i 1 Synchronous filtering is turned on only if the detection frequency refer e...

Page 91: ...output i to quantity j where j is listed below CH1 i 1 CH2 i 2 j output quantity j output quantity 0 CH 1 Display 0 CH 2 Display 1 X 1 Y OEXP i x j The OEXP command sets or queries the output offsets...

Page 92: ...returned as ASCII strings with units of Volts The resolution is 1 3 mV This command is a query only command AUXV i x The AUXV command sets or queries the Aux Output voltage when the output The parame...

Page 93: ...ked out when the unit is in the REMOTE state The OVRM 0 command returns the unit to normal remote operation KCLK i The KCLK command sets or queries the key click On i 1 or Off i 0 state ALRM i The ALR...

Page 94: ...uto Reserve may take some time Check the command execution in progress bit in the Serial Poll Status Byte bit 1 to determine when the function is finished APHS The APHS command performs the Auto Phase...

Page 95: ...ime The buffer holds 16383 samples taken at the sample rate The entire storage time is 16383 divided by the sample rate End of Scan When the buffer becomes full data storage can stop or continue The f...

Page 96: ...Generally the highest possible sample rate should be used given the desired storage time The lock in time constant and filter slope should be chosen to attenuate signals at frequencies higher than 1...

Page 97: ...a storage If storage is already paused or reset then this command is ignored REST The REST command resets the data buffers The REST command can be sent at any time any storage in progress paused or no...

Page 98: ...or R and The SNAP command requires at least two parameters and at most six parameters The parameters i j k l m n select the parameters below i j k l m n parameter 1 X 2 Y 3 R 4 5 Aux In 1 6 Aux In 2 7...

Page 99: ...s the number of stored points as returned by the SPTS query then an error occurs Remember SPTS returns N where N is the total number of bins the TRCA command numbers the bins from 0 oldest to N 1 most...

Page 100: ...llustrated below The mantissa is a signed 16 bit integer 32768 to 32767 The exponent is a signed integer whose value ranges from 0 to 248 thus byte 3 is always zero The value of a data point is simply...

Page 101: ...e values of X and Y are transferred as signed integers 2 bytes long 16 bits X is sent first followed by Y for a total of 4 bytes per sample The values range from 32768 to 32767 The value 30000 represe...

Page 102: ...allowed In the REMOTE state command execution is allowed but the keyboard and knob are locked out except for the LOCAL key which returns the SR830 to the LOCAL state In the LOCAL LOCKOUT state all fr...

Page 103: ...s value PSC i The PSC command sets the value of the power on status clear bit If i 1 the power on status clear bit is set and all status registers and enable registers are cleared on power up If i 0 t...

Page 104: ...til ALL enabled status bits in the Error LIA and Standard Event status bytes are cleared by reading the status bytes or using CLS Using STB to read the Serial Poll Status Byte A bit in the Serial Poll...

Page 105: ...needs to be set LIAE 0 1 command and bit 3 in the Serial Poll Enable register must be set SRE 3 1 command When a reserve overload occurs bit 0 in the LIA Status byte is set Since bit 0 in the LIA Stat...

Page 106: ...hanged indirect ly either by changing frequency range dynamic reserve filter slope or expand 6 TRIG Set when data storage is triggered Only if sam ples or scans are in externally triggered mode 7 unus...

Page 107: ...5 24 Remote Programming...

Page 108: ...transfers Once all the hardware and GPIB drivers are configured use IBIC This terminal emulation program allows you to send commands to the SR830 directly from your computer s keyboard If you cannot t...

Page 109: ...test devName n exit 1 else initGpib SR830 txLia OUTX1 Set the SR830 to output responses to the GPIB port setupLia Setup the SR830 printf nAcquiring Data n ibtmo lia 0 turn off timeout for lia or set t...

Page 110: ...sults format and print results printf Press Enter to continue getch printf n printf Reading Results in LIA Binary Format n sprintf tstr TRCL 1 0 d nPts use TRCL to read the points in LIA floating poin...

Page 111: ...i mant exp int ptr float val printf n n ptr int rfBuf ptr points to integers in rfBuf not floats for i 0 i 10 i mant ptr first comes the mantissa 16 bits exp ptr 124 then the binary exponent 16 bits...

Page 112: ...Remote Programming txLia SRAT10 SEND0 set 64 Hz sample rate stop at end txLia DDEF1 1 0 DDEF2 1 0 set CH1 R CH2 theta Buffers store CH1 and CH2 printf Scan is Initialized Press Enter to Begin Scan ge...

Page 113: ...5 30 Remote Programming...

Page 114: ...OUTX i The SR830 OUTX i command sets the output interface to RS232 i 0 or GPIB i 1 The OUTX i command MUST be at the start of ANY SR830 program to direct responses to the interface in use FMOD i The...

Page 115: ...o Q1 or Q2 and only if the S4 command is used first OX n v OY n v OR n v Change the X Y or R offsets Remember v is an input voltage not a percentage for the SR530 Unlike the SR530 the X and Y offsets...

Page 116: ...the SR530 Programs which query the SR530 status need to be changed to query the equivalent SR830 status byte W n Not implemented Do not use X n v Set or query the auxiliary analog ports If n 1 2 3 or...

Page 117: ...5 34 Remote Programming...

Page 118: ...y tests are performed The self test does not require any warm up period It is necessary to turn the unit off and on to preset it As long as the unit is powered on immediately this will not affect the...

Page 119: ...o LED s on Use the knob to move the turned on LED s across the panel Press Freq to increase the number of on LED s Make sure that every LED can be turned on Press any other key to exit this test mode...

Page 120: ...sts should be checked before any of the performance tests Setup No external setup is required for this test Procedure 1 PRESET Turn on the lock in with the Setup key pressed Check the results of the D...

Page 121: ...6 4 Performance Tests...

Page 122: ...Setup key pressed 2 Press the keys in the following sequence Freq Use the knob to set the frequency to 1 00 Hz Sensitivity Down Set the sensitivity to 1 mV CH1 Display Set the Channel 1 display to R...

Page 123: ...6 6 Performance Tests...

Page 124: ...n Procedure 1 PRESET Turn the lock in off and on with the Setup key pressed 2 Press the keys in the following sequence Freq Use the knob to adjust the frequency to 100 0 Hz Channel 1 Display Set the C...

Page 125: ...6 8 Performance Tests...

Page 126: ...t the AC Calibrator to Function Sine Frequency 1 kHz Frequency 1 kHz Amplitude 1 000 Vrms Amplitude 0 5 Vrms Voltage Off Offset off or 0V Phase Lock On Sweep off Sense Internal Modulation none Procedu...

Page 127: ...Hz a Set the AC calibrator to 1 kHz and an amplitude of 200 00 mVrms b Set the frequency synthesizer to 1 kHz c Press Sensitivity Up Dn Set the sensitivity 200 mV d Set the AC calibrator and frequency...

Page 128: ...to Set the AC Calibrator to Function Sine Frequency 1 kHz Frequency 1 kHz Amplitude 1 0000 Vrms Amplitude 0 5 Vrms Voltage Off Offset off or 0V Phase Lock On Sweep off Sense Internal Modulation none P...

Page 129: ...6 12 Performance Tests...

Page 130: ...TL SYNC output of the frequency synthesizer to the Reference input of the lock in Procedure 1 PRESET Turn the lock in off and on with the Setup key pressed 2 Set the frequency synthesizer to a frequen...

Page 131: ...6 14 Performance Tests...

Page 132: ...Select 24 dB oct Couple Select DC coupling Channel 1 Display Set the Channel 1 display to R Channel 2 Display Set the Channel 2 display to 3 The value of R should be 1 000 V 2 and the value of should...

Page 133: ...6 16 Performance Tests...

Page 134: ...ude and sensi tivity setting in the table below perform steps 3a through 3b Sensitivity Sine Output Amplitude 1 V 1 000 Vrms 200 mV 0 200 Vrms 50 mV 0 050 Vrms 10 mV 0 010 Vrms a Press Ampl Use the kn...

Page 135: ...value in the table e Wait for the R reading to stabilize Record the value of R f Repeat steps 4d and 4e for all of the frequencies listed 5 This completes the sine output amplitude accuracy and frequ...

Page 136: ...outputs repeat steps 2a through 2e a Connect the CH1 or CH2 output to the DVM Set the DVM to 19 999 V range b Press Channel 1 or 2 Offset On Off Turn the offset on c For each of the offsets in the tab...

Page 137: ...e in table 3c above repeat steps 5d and 5e d Use the knob to adjust the Aux Out 1 level to the values from the table above e Record the Aux Input 1 or 2 value from the Channel 1 display 6 For Aux Inpu...

Page 138: ...1 PRESET Turn the lock in off and on with the Setup key pressed 2 Press the keys in the following sequence Sensitivity Down Set the sensitivity to 100 nV Channel 1 Display Set the Channel 1 display t...

Page 139: ...6 22 Performance Tests...

Page 140: ...Accuracy and Flatness Sensitivity Calibrator Ampl Lower Limit Reading Upper Limit 1 V 1 0000 Vrms 0 9900 V _______ 1 0100 V 200 mV 200 00 mVrms 198 00 mV _______ 202 00 mV 100 mV 100 000 mVrms 99 00 m...

Page 141: ...eg 8 Sine Output Amplitude and Flatness Sensitivity Sine Output Ampl Lower Limit Reading Upper Limit 1 V 1 000 Vrms 0 9800 V _______ 1 0200 V 200 mV 0 200 Vrms 196 00 mV _______ 204 00 mV 50 mV 0 050...

Page 142: ...____ 10 040 V Output Voltage Lower Limit Reading Upper Limit AUX OUT 2 10 000 10 040 V _______ 9 960 V 5 000 5 040 V _______ 4 960 V 0 000 0 020 V _______ 0 020 V 5 000 4 960 V _______ 5 040 V 10 000...

Page 143: ...____ 0 020 V 5 000 4 960 V _______ 5 040 V 10 000 9 960 V _______ 10 040 V Input Voltage Lower Limit Reading Upper Limit AUX IN 3 10 000 10 040 V _______ 9 960 V 5 000 5 040 V _______ 4 960 V 0 000 0...

Page 144: ...to be serviced by qualified service personnel only There are no user serviceable parts inside CIRCUIT BOARDS The SR830 has five main printed circuit boards The five boards shown contain most of the a...

Page 145: ...7 2 Circuit Description...

Page 146: ...on the CPU board PCS0 is decoded into 16 I O strobes which access the displays keypad and knob etc PCS1 decodes the the GPIB controller PCS2 selects the UART FRONT PANEL INTERFACE U614 and U615 buffer...

Page 147: ...s are used for all supplies to reduce rectifier losses Resistors provide a bleed current on all of the unregulated supply filter capacitors Because of the large capacitances in this circuit the time f...

Page 148: ...Hz cycle and the DSP performs 59 instructions each cycle each instruction takes two clocks The crystal also sets the internal reference frequency accuracy When the reference mode is external the VCO v...

Page 149: ...d by DAC U206 and output by driver U207 U209 discriminates the zero crossings to provide a TTL square wave at the reference frequency This is the TTL SYNC out as well as the feedback to the phase lock...

Page 150: ...bout 2000 The notch filters are simple single stage inverting band pass filters summing with their inputs to remove 60 Hz or 120 Hz Each filter has a depth and frequency adjustment 60 Hz depth P222 an...

Page 151: ...which hold configuration data for the analog board They are written via the iso lated data bus from the DSP board This data bus is active only when the Analog board is addressed This prevents noise fr...

Page 152: ...c Ceramic 50V 20 Z5U C 156 5 00023 529 1U Cap Monolythic Ceramic 50V 20 Z5U C 157 5 00023 529 1U Cap Monolythic Ceramic 50V 20 Z5U C 171 5 00002 501 100P Capacitor Ceramic Disc 50V 10 SL C 173 5 00002...

Page 153: ...17 2 2U Capacitor Tantalum 35V 20 Rad C 386 5 00100 517 2 2U Capacitor Tantalum 35V 20 Rad C 387 5 00100 517 2 2U Capacitor Tantalum 35V 20 Rad C 388 5 00100 517 2 2U Capacitor Tantalum 35V 20 Rad C 3...

Page 154: ...pacitor Ceramic 50V 80 20 Z5U AX C 656 5 00225 548 1U AXIAL Capacitor Ceramic 50V 80 20 Z5U AX C 657 5 00225 548 1U AXIAL Capacitor Ceramic 50V 80 20 Z5U AX C 658 5 00225 548 1U AXIAL Capacitor Cerami...

Page 155: ...3 421 82X4 Res Network SIP 1 4W 2 Isolated PC1 7 00356 701 L I DIGITAL Printed Circuit Board Q 101 3 00021 325 2N3904 Transistor TO 92 Package Q 102 3 00022 325 2N3906 Transistor TO 92 Package Q 201 3...

Page 156: ...1 8W 1 50PPM R 214 4 00652 407 1 58K Resistor Metal Film 1 8W 1 50PPM R 215 4 00409 408 1 210K Resistor Metal Film 1 8W 0 1 25ppm R 216 4 00409 408 1 210K Resistor Metal Film 1 8W 0 1 25ppm R 217 4 0...

Page 157: ...3 401 200 Resistor Carbon Film 1 4W 5 T 201 6 00137 601 15MH Inductor TP101 1 00143 101 TEST JACK Vertical Test Jack TP102 1 00143 101 TEST JACK Vertical Test Jack TP103 1 00143 101 TEST JACK Vertical...

Page 158: ...87 340 LF347 Integrated Circuit Thru hole Pkg U 303 3 00088 340 LF353 Integrated Circuit Thru hole Pkg U 380 3 00149 329 LM317T Voltage Reg TO 220 TAB Package U 381 3 00141 329 LM337T Voltage Reg TO 2...

Page 159: ...20 Rad C 183 5 00100 517 2 2U Capacitor Tantalum 35V 20 Rad C 201 5 00060 512 1 0U Cap Stacked Metal Film 50V 5 40 85c C 202 5 00060 512 1 0U Cap Stacked Metal Film 50V 5 40 85c C 221 5 00060 512 1 0U...

Page 160: ...Ceramic 50V 20 Z5U C 463 5 00023 529 1U Cap Monolythic Ceramic 50V 20 Z5U C 480 5 00098 517 10U Capacitor Tantalum 35V 20 Rad C 481 5 00098 517 10U Capacitor Tantalum 35V 20 Rad C 482 5 00098 517 10U...

Page 161: ...lti Turn Side Adjust P 201 4 00759 445 50 Pot Multi Turn Side Adjust P 202 4 00760 445 500 Pot Multi Turn Side Adjust P 221 4 00730 445 100 Pot Multi Turn Side Adjust P 222 4 00760 445 500 Pot Multi T...

Page 162: ...50PPM R 227 4 00158 407 2 00K Resistor Metal Film 1 8W 1 50PPM R 228 4 00158 407 2 00K Resistor Metal Film 1 8W 1 50PPM R 241 4 00380 407 6 34K Resistor Metal Film 1 8W 1 50PPM R 242 4 00556 407 2 94K...

Page 163: ...r Metal Film 1 8W 1 50PPM R 372 4 00700 407 1 62K Resistor Metal Film 1 8W 1 50PPM R 373 4 00763 407 14 0K Resistor Metal Film 1 8W 1 50PPM R 374 4 00158 407 2 00K Resistor Metal Film 1 8W 1 50PPM R 3...

Page 164: ...ack TP103 1 00143 101 TEST JACK Vertical Test Jack TP104 1 00143 101 TEST JACK Vertical Test Jack TP201 1 00143 101 TEST JACK Vertical Test Jack TP301 1 00143 101 TEST JACK Vertical Test Jack TP302 1...

Page 165: ...le Pkg U 371 3 00130 340 5532A Integrated Circuit Thru hole Pkg U 381 3 00130 340 5532A Integrated Circuit Thru hole Pkg U 386 3 00423 340 5534 Integrated Circuit Thru hole Pkg U 391 3 00088 340 LF353...

Page 166: ...eramic Disc 250V 10 Y5P C 903 5 00022 501 001U Capacitor Ceramic Disc 50V 10 SL C 907 5 00012 501 330P Capacitor Ceramic Disc 50V 10 SL C 908 5 00012 501 330P Capacitor Ceramic Disc 50V 10 SL C 909 5...

Page 167: ...1 MBR360 Diode D 8 3 00391 301 MBR360 Diode D 9 3 00391 301 MBR360 Diode D 15 3 00391 301 MBR360 Diode D 16 3 00001 301 1N4001 Diode D 18 3 00001 301 1N4001 Diode D 19 3 00001 301 1N4001 Diode D 20 3...

Page 168: ...Resistor Metal Film 1 8W 1 50PPM R 40 4 00517 407 3 57K Resistor Metal Film 1 8W 1 50PPM R 401 4 00034 401 10K Resistor Carbon Film 1 4W 5 R 402 4 00079 401 4 7K Resistor Carbon Film 1 4W 5 R 601 4 0...

Page 169: ...Thru hole Pkg U 612 3 00039 340 74HC14 Integrated Circuit Thru hole Pkg U 614 3 00539 340 74HCT245 Integrated Circuit Thru hole Pkg U 615 3 00539 340 74HCT245 Integrated Circuit Thru hole Pkg U 701 3...

Page 170: ...citor Electrolytic 50V 20 Rad C 18 5 00225 548 1U AXIAL Capacitor Ceramic 50V 80 20 Z5U AX C 2001 5 00219 529 01U Cap Monolythic Ceramic 50V 20 Z5U C 2003 5 00219 529 01U Cap Monolythic Ceramic 50V 20...

Page 171: ...ED COATED LED Coated Rectangular D 31 3 00547 310 RED COATED LED Coated Rectangular D 32 3 00547 310 RED COATED LED Coated Rectangular D 33 3 00547 310 RED COATED LED Coated Rectangular D 34 3 00547 3...

Page 172: ...ature D 80 3 00575 311 GREEN MINI LED Subminiature D 81 3 00575 311 GREEN MINI LED Subminiature D 82 3 00575 311 GREEN MINI LED Subminiature D 83 3 00575 311 GREEN MINI LED Subminiature D 84 3 00575 3...

Page 173: ...Diode D 130 3 00004 301 1N4148 Diode D 131 3 00004 301 1N4148 Diode D 132 3 00004 301 1N4148 Diode J 1 1 00202 131 36 PIN SI SOCK Connector Female J 2 1 00202 131 36 PIN SI SOCK Connector Female J 3 1...

Page 174: ...Integrated Circuit Thru hole Pkg U 10 3 00548 340 74HCT574 Integrated Circuit Thru hole Pkg U 11 3 00548 340 74HCT574 Integrated Circuit Thru hole Pkg U 12 3 00548 340 74HCT574 Integrated Circuit Thru...

Page 175: ...000 PHONO PLUG Hardware Misc Z 0 0 00390 024 1 72X1 4 Screw Slotted Z 0 0 00391 010 1 72X5 32X3 64 Nut Hex Z 0 0 00407 032 SOLDR SLV RG174 Termination Z 0 0 00418 000 CLIP CABLE Hardware Misc Z 0 0 0...

Page 176: ...d Part Z 0 7 00515 720 SR830 20 Fabricated Part Z 0 7 00532 720 SR830 21 Fabricated Part Z 0 7 00582 720 SR830 23 Fabricated Part Z 0 9 00267 917 GENERIC Product Labels Z 0 9 00552 924 COPPERFOIL 1 Ta...

Page 177: ...PARTS LIST 7 34 NOTICE Schematics may not show current part numbers or values Refer to parts list for current part numbers or values...

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