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OUTPUT STEPS LESS THAN 2.0 VOLTS
The output from the fast transition-time units
will have a step amplitude of 1/2 of the
programmed output amplitude from the DG535.
The offset, which may be adjusted for the best
pulse shape on the fast transition, will be about -
0.8 VDC for the fast risetime unit, and about
+0.8 VDC for the fast fall time unit (.ie. 1/2 of
the programmed offset).
The offset is critical to the operation of the
device: the offset is used to forward bias the
step recovery diode (SRD) prior to the pulse
output from the DG535. When the pulse from
the DG535 begins, the stored carriers in the
SRD maintain the conduction in the diode,
shunting the output pulse to ground. When the
stored carriers are depleted (about 3 ns after the
start of the pulse), the diode abruptly stops
conduction, creating a very fast transition time
step at the output.
The offset must be increased when the output
amplitude is increased. The offset should be set
to about 1.45 v for a 1.0 V amplitude, and to
about 1.70 V for a 4.0 V amplitude from the
DG535. The offset may be adjusted for the best
output pulse shape. If the offset is set too high,
the output step will overshoot: if the offset is too
small, the output step will undershoot the final
value.
OUTPUTS STEPS UP TO 3.7 VOLTS
The step size of the output pulse may be increased
to about 3.7 VDC by changing the output
configuration of the DG535. This configuration will
increase the step size and the distortion of the output
pulse.
In each of these cases, the offset of the DG535's
outputs may be adjusted for minimum pulse
distortion. Specifying a load impedance of 50
Ω
will
allow larger pulse amplitudes at the expense of
increased ringing after the fast transition. Pulse
aberrations after the fast transition will be about
10%, or about 3x larger than the pulse aberrations
when a high impedance load is specified.
OUTPUT STEPS UP TO 15 VOLTS
The fast rise time (option 04A) and fast fall time
(option 04B) units may be used with the high
voltage rear panel outputs (option 02) to generate
step sizes up to 15 V. A bias tee, Option 04C, is
required for this mode of operation.
The high voltage rear panel outputs are ac coupled
hence some accommodation must be made to
provide a dc current to forward bias the SRD prior
to the output pulse. This current is applied via a bias
tee (Option 04C) which passes the bias current
through an inductor to the diode. The same inductor
SETUP FOR OUTPUT STEPS LESS
THAN 2.0 VOLTS
Option 04A, Fast Risetime
(All front panel outputs)
LOAD= HIGH-Z
Internal 50
Ω
in place
VARiable output
AMP1 to +4V
Output step = AMPLITUDE/2
OFFSET -1.45 to -1.70 V
Adjust for best shape
Option 04B, Fast Falltime
(T0, A, B, C, D only)
LOAD = HIGH-Z Internal 50
Ω
in place
VARiable Output
AMPLITUDE -1 to -4V Output step = AMPLITUDE/2
1.45 to +1.70 V
Adjust for best shape
__ __
Option 04B, Fast Falltime
(AB, AB, CD, CD)
LOAD = HIGH-Z Internal 50
Ω
in place
VARiable Output
AMP1 to +4V
Output step = AMPLITUDE/2
OFFSET=1.6V-AMPLITUDE
Adjust for best shape
SETUP FOR OUTPUT STEPS UP TO
3.7 VOLTS
Option 04A, Fast Risetime
(All front panel outputs)
LOAD = 50
Ω
Removes internal 50
Ω
VARiable outputs
AMPLITUDE = 4.0 V
OFFSET = -1.15 V
Option 04B, Fast Falltime
(T0, A, B, C, D only)
LOAD = 50
Ω
Removes internal 50
Ω
VARiable outputs
AMPLITUDE = -4.0 V
OFFSET = +1.15 V
__ __
Option 04B, Fast Falltime
(AB, AB, CD, CD)
LOAD = 50
Ω
Removes internal 50
Ω
VARiable Outputs
AMPLITUDE = 4.0 V
OFFSET = 1.15V - AMPLITUDE
