29
of Q303A through the emitter follower Q301A
for improved pulse response at high currents.
Q302A is used to sink currents from the output
BNC. The sink current is controlled by feeding
back the amplified voltage across the 10
Ω
shunt
resistor, R305A, to the error amplifier, 4/4
U313.
The offset current is passed to the output via
L301A. This inductor improves the high
frequency response of the current source,
maintaining constant current during output
transitions, and isolating the offset current
source from the output BNC.
IMPEDANCE CONTROL
Both the output pulse driver and the offset
current source require a 50
Ω
load to work
properly. In some applications the user will not
want to use a 50
Ω
load, and so, each channel
has a 50
Ω
load which may be placed on the
output. This 50
Ω
load consists of the 45.3
Ω
resistor, R322A, and the JFET transistor,
Q311A, which has about 5
Ω
of channel
resistance when it is turned on by a high level
on A_TERM.
The 50
Ω
load is placed on the output if the user
specifies that there is a high impedance load on
the output. (The load specification is made in
the OUTPUT Menu from the front panel.) If the
wrong specification is made then the output will
have 1/2 the programmed amplitude and offset
(in the case where two 50
Ω
loads are on the
output), or will misbehave altogether (in the
case where no load is on the output).
GATE OUTPUT DRIVERS
The Gate Output Drivers are essentially the
same as the output drivers for channels T0, A,
B, C and D, except that there are outputs on
both sides of the output current switch formed
by Q314 and Q315. This allows the
simultaneous output of the gate pulse and its
complement for differential pulse applications.
The second output requires a second bipolar
offset current source. Both of the offset current
sources are controlled by D/A outputs from the
processor: these D/A controls are separate (to
compensate for the different input offset
voltages on the two current sources), but are
controlled together, i.e., the offset current sources
are both controlled by the same menu item from the
front panel.
POWER SUPPLIES
The unit uses a linear power supply to ge15,
+6.0, +5.2, +5.0, -2.0, -5.2, -6.0, and -15VDC. The
line voltage enters through a power entry module,
which provides a fuse and RFI filter. The power
entry module also configures the primary of the
power transformer so that the unit can operate from
100, 120, 220 or 240VAC. The secondary voltages
of the power transformer are full-wave rectified by
BR601 and BR501 and filtered by C605, C606,
C608 and C609 to provide unregulated ±20VDC and
±9 VDC.
On the "top" PCB, the voltage regulators U501,
U503, and U601 p5.0, -15, and +15VDC.
There is a jumper header in the outputs of each of
these regulators to allow current measurements to be
made. The +5.0VDC regulator is bypassed by a
10
Ω
, 5Watt resistor to reduce the current in this
regulator. U502, an LM2901 quad comparator, is
used to generate active low signals to indicate
DROPOUT and RESET. DROPOUT is asserted if
the unreg9VDC drops below 7.5VDC or if
the unregulated -9VDC goes above -6.8VDC. The
DROPOUT signal generates an interrupt to the
processor to allow it enough time to store checksum
bytes on the instrument settings before power is lost.
The RESET signal is asserted for about one second
on power-up (C503 and RN2+R502) or whenever
the unreg9VDC is below 6.8VDC. The
RESET signal is used to reset the microprocessor,
and to protect the battery backed-up RAM when the
power is first applied or removed.
All of the unregulated voltages and the three
regulated voltages generated on the "top" PCB are
passed down the "bottom" PCB via J7. The voltage
regulators on the "bottom" PCB, U902, 903, 909,
908 and U907, provide reg6.0, +5.2, -2.0, -
5.2 and -6.0VDC. All of these regulators, except
U903 (+5.2VDC), have heat sinks and jumpers in
their outputs (to allow current measurements). The -
5.2VDC regulator (U908) is bypassed by a 10
Ω
,
5Watt resistor to reduce the current load in this
regulator. The -2.0VDC regulator, (U909) has a
6.8
Ω
, 5Watt resistor in series with its input to
reduce the power dissipated in the regulator. The
