- SS-HQ1 Application Notes -
Ver.1.0.0 January 7, 2005
45
6.3.4. Clock System Selection
The internal clock of CXD3172AR is switched according to the operation mode. Please wire the VDD or GND
side from P12 to P15 setup of CXD3172AR and set by pull up/down according to the system conditions to be
used. Since the clock system does not operate normally when the following setup is not correct, please ensure
a setup.
The pins from P12 to P15 of CXD3172AR are assigned to the parameter (MODESEL) which switches
operation modes as the initial setting and pins for the port driver. The parameter (MODESEL) controls CCD
types, TV system and clock setting in a lump. It isn’t necessary of resetting these parameters.
Table 6.3-2 Setting Method of Operation Mode pins (P12 - 15)
Clock pin
MODESEL
P15
(84pin)
P14
(83pin)
P13
(82pin)
P12
(80pin)
TV system
CCD
ECK
(88pin)
MCK
(43pin)
0[h] Low Low Low Low
-
1[h] Low
Low
Low
High
2[h] Low
Low
High
Low
NTSC
MCK
3[h] Low
Low
High
High
-
4[h] Low High Low Low
5[h] Low High Low High
PAL
510H
MCK
6[h] Low
High
High
Low
-
8[h] High
Low
Low
Low
NTSC
MCK
9[h] High Low Low High
-
A[h] High
Low
High
Low
B[h] High
Low
High
High
PAL
760H
ECK
MCK