Sony SS-HQ1, Application Notes

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- SS-HQ1 Application Notes -
Ver.1.0.0 January 7, 2005
203
*3. YDACCKSEL
YDACCKSEL is a parameter for switching Y-DAC and the encoder clock (ECK/MCK). The YDLY value is
switched based on the value of this parameter.
Table 12.2-22 YDACCKSEL Parameter
Parameter Description
YDACCKSEL CAT1_Byte12_bit2
0[h]:ECK(default)
1[h]:MCK
*4. YDLY0/1
These parameters preset the values to be applied to YDLY based on the YDACCKSEL value.
• If YDACCKSEL=0[h]
The YDLY0 setting is applied to YDLY.
• If YDACCKSEL=1[h]
The YDLY1 setting is applied to YDLY.
Table 12.2-23 YDLY0/1 Parameter
Parameter Description
YDLY0 CAT12_Byte14_bit0-3
YDLY value when YDACCKSEL=0[h]
(valid only when YDLYOFF=0[h])
YDLY1 CAT12_Byte15_bit0-3
YDLY value when YDACCKSEL=1[h]
(valid only when YDLYOFF=0[h])
Example YDLY switching control parameter settings
(for 760H NTSC system configured using Sony evaluation board)
The following procedure is used for YDLY switching (assumes DACMODE=1[h]) using the ECK-28MHz
(MODESEL=6[h] and ECK-27MHz (MODESEL=8[h]) systems respectively, on the Sony evaluation board.
1. Set YDLY0 to “1[h]” as the ECK-28MHz setting. (See
Table 12.2-23
.)
2. Set YDLY1 to “2[h]” as the ECK-27MHz setting. (See
Table 12.2-23
.)
3. Set YDLYOFF to “0[h]”. (See
Table 12.2-20
.)
4. When YDLY is combined with system switching, the YDLY value changes to the appropriate value. For
ECK-28MHz INT, this value is YDLY=1[h]. For ECK-27MHz LL, the value is YDLY=2[h].
* The Y delay varies depending on the product set. Set a value which is appropriate on your set board.