14.4 Register Map Overview and Default Settings Values
The Si5391/Si5391P family parts have large register maps that are divided into separate “Pages” of register banks. This allows more
register addresses than either the I
2
C or SPI serial interface standards 8-bit addressing provide. Each page has a maximum of 256
addresses, however not all addresses are used on every page. Every register has a maximum data size of 8-bits, or 1 byte. Writing the
page number to the 8-bit serial interface address of 0x01 on any page (0x0001, 0x0101, 0x0201, etc.) updates the page selection for
subsequent register reads and writes. For example, to access the value in register 0x040E, it is first necessary to write the page value
0x04 to serial interface register address 0x01. At this point, the value of serial interface address 0x0E (0x040E) may be read or written.
Note that is it not necessary to write the page select register again when accessing other registers on the same page. Similarly, the
read-only DEVICE_READY status is available from every page at serial interface address 0xFE (0x00FE, 0x01FE, 0x02FE, etc.).
It is recommended to use dynamic Read-Modify-Write methods when writing to registers which contain multiple settings, such as
register 0x0011. To do this, first read the current contents of the register. Next, update only the select bit or bits that are being modified.
This may involve using both logical AND and logical OR operations. Finally, write the updated contents back to the register. Writing to
pages, registers, or bits not documented below may cause undesired behavior in the device.
Details of the register and settings information are organized hierarchically below. To find the relevant information for your application,
first choose the section corresponding to the base part number, Si5391 for your design. Then, choose the section under that for the
page containing the desired register(s).
Default register contents and settings differ for each device part number, or OPN. This information may be found by searching for the
Custom OPN for your device using the link below. Both Base/Blank and Custom OPNs are available there. See the previous section on
“Base vs. Factory Preprogrammed Devices" for more information on part numbers. The Private Addendum to the data sheet lists the
default settings and frequency plan information. You must be logged into the Skyworks website to access this information. The Public
addendum gives only the general frequency plan information (
https://www.skyworksinc.com/en/Application-Pages/Timing-Lookup-Cus-
Table 14.1. Register Map Paging Descriptions
Page
Start Address (Hex)
Start Address (Decimal)
Contents
Page 0
0000h
0
Alarms, interrupts, reset, device ID, revision ID
Page 1
0100h
256
Clock output configuration
Page 2
0200h
512
P,R dividers, scratch area
Page 3
0300h
768
Output N dividers, N divider FINC/FDEC
Page 9
0900h
2304
Control IO configuration
R = Read Only
R/W = Read Write
S = Self Clearing
A self-clearing bit will be cleared by the device once the operation initiated by this bit is complete. Registers with “sticky” flag bits, such
as LOS0_FLG, are cleared by writing “0” to the bit that has been automatically set high by the device.
Si5391 Reference Manual • Register Map
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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