The _FLG bits are “sticky” versions of the alarm bits and will stay high until cleared. A _FLG bit can be cleared by writing a zero to the
_FLG bit. When a _FLG bit is high and its corresponding alarm bit is low, the _FLG bit can be cleared.
During run time, the source of an interrupt can be determined by reading the _FLG register values and logically ANDing them with
the corresponding _MSK register bits (after inverting the _MSK bit values). If the result is a logic one, then the _FLG bit will cause an
interrupt.
For example, if LOS_FLG[0] is high and LOS_INTR_MSK[0] is low, then the INTR pin will be active (low) and cause an interrupt. If
LOS[0] is zero and LOS_MSK[0] is one, writing a zero to LOS_MSK[0] will clear the interrupt (assuming that there are no other interrupt
sources). If LOS[0] is high, then LOS_FLG[0] and the interrupt cannot be cleared.
Note:
The INTR pin may toggle during reset.
Si5391 Reference Manual • Clock Inputs
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Rev. 0.5 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • January 11, 2022
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