SiFive E300, Reference Manual

Page: 46 / 66

38 SiFive E300 Platform Reference Manual, Version 1.0.1
Transmit Data Register (
txdata
)
Writing to the
txdata
register enqueues the character contained in the
data
field to the transmit
FIFO if the FIFO is able to accept new entries. Reading from
txdata
returns the current value of
the
full
flag and zero in the
data
field. The
full
flag indicates whether the transmit FIFO is able
to accept new entries; when set, writes to
data
are ignored. A RISC-V
amoswap
instruction can
be used to both read the
full
status and attempt to enqueue data, with a non-zero return value
indicating the character was not accepted.
full
31
0
30 8
data
7 0
Figure 12.1: Format of
txdata
register.
Receive Data Register (
rxdata
)
Reading the
rxdata
register dequeues a character from the receive FIFO, and returns the value
in the
data
field. The
empty
flag indicates if the receive FIFO was empty; when set, the
data
field
does not contain a valid character. Writes to
rxdata
are ignored.
empty
31
0
30 8
data
7 0
Figure 12.2: Format of
rxdata
register.
Transmit Control Register (
txctrl
)
The read-write
txctrl
register controls the operation of the transmit channel. The
txen
bit controls
whether the Tx channel is active. When cleared, transmission of Tx FIFO contents is suppressed,
and the
txd
pin is driven high.
The
nstop
field specifies the number of stop bits:
0
for one stop bit and
1
for two stop bits.
The
txcnt
field specifies the threshold at which the Tx FIFO watermark interrupt triggers.
The
txctrl
register is reset to
0
.
R
eserve
d
31 19
txcnt
18 16
R
eserve
d
15 2
nstop
1
txen
0
Figure 12.3: Format of
txctrl
register.