Sharp GX15, Service Manual

Page: 104 / 122

GX15
6 – 16
CONFIDENTIAL
IC601 VHIXC621918-1L (XC621918): REGULATOR
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
IC603 (LR38876): CAMERA I/F CONVERSION LSI
Pin No. Terminal name Input/Output Description of terminal
1 VIN Input Input
2* NC – Not used
3 VOUT Output Output
4* NC – Not used
5 VSS – Earth
6 CE Input ON/OFF Control
Pin No. Terminal name Input/Output Description of terminal
1* – – Continuity test terminal (Not used)
2 EXCKI Input System clock input
3 GND – Earth
4 A19 Input CPU I/F address
5 A2 Input CPU I/F address
6 WRB Input CPU I/F write signal input
7 GND – Earth
8 OD9 Input/Output CPU I/F data bus, bit 9
9 OD10 Input/Output CPU I/F data bus, bit 10
10* – – Continuity test terminal (Not used)
11 GND – Earth
12 CVDD – Internal core power supply (+1.8 V)
13 A18 Input CPU I/F address
14 A1 Input CPU I/F address
15 RDB Input CPU I/F read signal input
16 HVDD2 – External digital power supply 2 (+1.8/3.0 V)
17 OD8 Input/Output CPU I/F data bus, bit 8
18 OD11 Input/Output CPU I/F data bus, bit 11
19 TEST5 Input Test terminal 5
20 OD7 Input/Output CPU I/F data bus, bit 7
21 OD13 Input/Output CPU I/F data bus, bit 13
22 OD12 Input/Output CPU I/F data bus, bit 12
23 OD6 Input/Output CPU I/F data bus, bit 6
24 OD5 Input/Output CPU I/F data bus, bit 5
25 A17 Input CPU I/F address
26 CSB Input CPU I/F chip select input
27 OD15 Input/Output CPU I/F data bus, bit 15
28 OD14 Input/Output CPU I/F data bus, bit 14
29 OD3 Input/Output CPU I/F data bus, bit 3
30 OD2 Input/Output CPU I/F data bus, bit 2
31 OD4 Input/Output CPU I/F data bus, bit 4
32 TEST4 Input Test terminal 4 (use Low input)
33 CLKO Output Output clock to camera module
34 GND – Earth
35 OD0 Input/Output CPU I/F data bus, bit 0
+
-
1
5
6 CE
VSS
VIN
ON/OFF
Control
Current
Limit
Voltage
Reference
Each circuit
R2
R1
3 VOUT