-30-
●
I / P Converter (IC501: SDA9415)
ISCM
Input sync controller Master
HINM
clock
doubling
PLLM
VINM
SYNCENM
CLKM
YINM
IFCM
Input
format
conversion
VHCOMM
Vertical and
Horizontal
compression
expansion
LM
Line memory
UVINM
TEST RESET
LBD
Letter
box
detection
TSNR
Temporal,
spetial
noise
reduction
VM
Vector
Memory
ME
motion
estimation
X2
X1CLKD
clock
doubling
PLLD
OSCM/S
Output sync
controller
Master
CLKOUT
INTERLACED
HOUT
VOUT
BLNK
YO
DAC
UO
DAC
VO
DAC
YOUT
UVOUT
OFC
4:4:4
3:3:3
Framiong
Delay
DLTI
DCTI
Peaking
M
U
X
SRAM
Scan rate
conversion
Master
Vertical
expansion
SRCS
LM
Line
Memory
ED
DRAM
+
Buffer
+
Voltage
control
+
Test-
controller
VHCOMM
Vertical and
Horizontal
compression
expansion
LM
Line memory
IFCM
Input
format
conversion
ISCS
Input sync controller Slave
HINS
VINS
SYNCENS
clock
doubling
PLLS
CLKM
YINS
UVINS
MC
Memory
Controller
PC
SCL
SDA
●
RGB Matrix (IC601: MN82860)
AnalogG/Y
AnalogB/U
AnalogR/V
DiditalG/Y
DiditalB/U
DiditalR/V
AD
AD
AD
YUV MA
TRIX
DIGIT
AL YUV
INTERF
A
C
E
RGB MA
TRIX
Black/White
Expander
White
Character
Collection
Color
Adjustment
De-Modulation
Axis
Adjustment
De-Modulation
Gain
Adjustment
OSD Data Inser
t
White Balance Adjust
I
2
C Bus
I/F
γ
Collection
R
G
B
Clock Input
I
2
C Bus
OSD Data Input
IC Block Diagrams
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