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Frame Relay for Sangoma Cards (C) Sangoma Technologies Inc. 1999,2000,2001 Page 52 of 78
SET_INTERRUPT_TRIGGERS (0x50)
Set the occurrences which will cause the SDLA adapter to trigger a hardware interrupt on the PC.
Control Block values to be set on entry
:
BUFFER_
LENGTH:
Set to 0x03.
DATA:
Offset 0x00 defines the interrupt triggers as follows:
bit 0 - the receive interrupt bit.
If this bit is set, then an interrupt will be triggered if there is an incoming
Information frame available for reception by the application.
bit 1 - the transmit interrupt bit.
The transmit interrupt may be used in two different ways:
a) DLCI specific transmit interrupt, where an interrupt will be triggered if an
Information frame of a specified length may be transmitted on a specific DLCI.
The length of the frame to be transmitted is defined at offset 0x01 to 0x02 of
the DATA area of this control block, and the DLCI is specified in the DLCI
definition area.
b) non-DLCI specific transmit interrupt, where an interrupt will be triggered if at
least one transmit buffer is available on the adapter. DLCI zero is specified in
the DLCI definition area.
bit 2 - the modem status interrupt.
If this bit is set, then an interrupt will be triggered when a change in the state of
CTS or DCD occurs. The details of this modem status change may be
established by using a READ_DLC_STATUS command to illicit a return code
of 0x10 and then examining the byte at offset 0x00 in the structure data area.
