Samsung SF-830, Service Manual

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3-10
CIRCUIT DESCRIPTION
Samsung Electronics
Repair Manual
No Pin Name I/O Reset Value Description PAD
211 ADDR9 O L Address Bus 9 for ROM PHOB8, 8 mA
212 Vddo Vdd - 5 V
213 ADDR10 O L Address Bus 10 for ROM PHOB8, 8 mA
214 Vsso Vss - 5 V Gnd
215 ADDR11 O L Address Bus 11 for ROM PHOB8, 8 mA
216 ADDR12 O " Address Bus 12 for ROM "
217 ADDR13 O " Address Bus 13 for ROM "
218 ADDR14 O " Address Bus 14 for ROM "
219 Vsso Vss - 5 V Gnd
220 ADDR15/CTOut[0] O L Address Bus 15 for ROM PHOB8, 8 mA
221 ADDR16/CTOut[1] O " Address Bus 16 for ROM "
222 ADDR17/CTOut[2] O " Address Bus 17 for ROM "
223 ADDR18/CTOut[3] O " Address Bus 18 for ROM "
224 Vsso Vss - 5 V Gnd
225 ADDR19/CTOut[4] O L Address Bus 19 for ROM PHOB8, 8 mA
226 ADDR20/CTOut[5] O " Address Bus 20 for ROM "
227 ADDR21/CTOut[6] O " Address Bus 21 for ROM "
228 ADDR22/CTOut[7] O " Address Bus 22 for ROM "
229 Vddo Vdd - 5 V
230 ADDR23/PTOut O L Address Bus 23 for ROM PHOB8, 8 mA
231 Vsso Vss - 5 V Gnd
232 TESTSE I - Scan Enable :Tied to Gnd PHILD50, ST
233 TM I - Test Mode :Tied to Gnd "
234 Vddi Vcca - 3.3 V for PLL
235 MCLK I - Master Clock PHIC
236 Vssi Vssa - 3.3 V Gnd for PLL
237 FILTER O -
Charge Pump Out :
Capacitor is connected
POBA
238 CPUTEST I -
CPU Test Mode :
Tied to Gnd
PHILD50, ST
239 nRESET I - Reset Input PHIL, ST
240 nRSTOUT O L Reset Output PHOB8, 8 mA