Samsung C8245, User Manual, Page: 263 / 315

A/D CONVERTER S3C8248/C8245/P8245/C8247/C8249/P8249
15-2
CONVERSION TIMING
The A/D conversion process requires 4 steps (4 clock edges) to convert each bit and 10 clocks to set-up A/D
conversion. Therefore, total of 50 clocks are required to complete an 10-bit conversion: When fxx/8 is selected
for conversion clock with an 8 MHz fxx clock frequency, one clock cycle is 1 us. Each bit conversion requires 4
clocks, the conversion rate is calculated as follows:
4 clocks/bit
×
10 bits + set-up time = 50 clocks, 50 clock
×
1us = 50 us at 1 MHz
A/D CONVERTER CONTROL REGISTER (ADCON)
The A/D converter control register, ADCON, is located at address F7H in set 1, bank 0. It has three functions:
— Analog input pin selection ( bits 4, 5, and 6 )
— End-of-conversion status detection ( bit 3)
— A/D operation start or enable ( bit 0 )
After a reset, the start bit is turned off. You can select only one analog input channel at a time. Other analog
input pins (ADC0–ADC7) can be selected dynamically by manipulating the ADCON.4–6 bits. And the pins not
used for analog input can be used for normal I/O function.
Start or enable bit
0 = Disable operation
1
= Start operation
A/D Converter Control Register (ADCON)
F7H, Set 1, Bank 1, R/W (EOC bit is read-only)
.7 .6 .5 .4 .3 .2 .1 .0 MSB LSB
End-of-conversion bit
0 = Conversion not complete
1 = Conversion complete
Always logic zero
A/D input pin selection bits:
ADC0
.6.5.4
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
000
001
010
011
100
101
110
111
Clock Selection bit: A/D input pin
00
01
10
11 f
XX
/16
f
XX
/8
f
XX
/4
f
XX
/1
.2.1 Conversion CLK
Figure 15-1. A/D Converter Control Register (ADCON)