
7542 Group
Rev.3.02 Oct 31, 2006 Page 9 of 134
REJ03B0006-0302
Fig. 9 Functional block diagram (Package type: PWQN0036KA-A)
FUNCTIONAL BLOCK DIAGRAM (Package type: PWQN0036KA-A)
X
IN
OUT
X
SI/O2(8)
RAM
ROM
CPU
A
X
Y
S
PC
H
PC
L
PS
V
SS
13
RESET
6
V
CC
8
7
CNV
SS
P1(5)
34
32
30
33
31
36
35
P2(6)
P3(6)
14
17
15
5
Reset input
I/O port P2
I/O port P1
I/O port P3
Clock generating circuit
Clock input
Clock output
11
12
4
2
3
1
A/D
converter
(10)
V
REF
Watchdog timer
Reset
0
16
INT
0
20
21
SI/O1(8)
CNTR
0
I/O port P0
Timer X (8)
Key-on wakeup
Prescaler X (8)
Timer B (16)
P0(8)
25
23
24
22
Timer 1 (8)
Prescaler 1 (8)
Timer A (16)
Input
Capture
Output
Compare
INT
1
29
27
28
26