
7542 Group
Rev.3.02 Oct 31, 2006 Page 7 of 134
REJ03B0006-0302
Fig. 7 Functional block diagram (Package type: PRSP0036GA-A)
FUNCTIONAL BLOCK DIAGRAM (Package type: PRSP0036GA-A)
X
IN
OUT
X
SI/O2(8)
RAM
ROM
CPU
A
X
Y
S
PC
H
PC
L
PS
V
SS
18
RESET
13
V
CC
15
14
CNV
SS
P1(5)
31
35
2
36
76
P2(8)
P3(8)
21
24
22
12
Reset input
I/O port P2
I/O port P1
I/O port P3
Clock generating circuit
Clock input
Clock output
16
17
11
9
10
8
A/D
converter
(10)
V
REF
Watchdog timer
Reset
0
23
INT
0
25
26
SI/O1(8)
CNTR
0
I/O port P0
Timer X (8)
Key-on wakeup
Prescaler X (8)
Timer B (16)
P0(8)
34
32
30
28
33
31
29
27
Timer 1 (8)
Prescaler 1 (8)
Timer A (16)
INT
1
19
20
5
4
Input
Capture
Output
Compare