Radyne DMD2050, Operation Manual

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Theory of Operation DMD2050 Universal Satellite Modem
3-4 TM110 - Rev. 1.3
The Baseband Printed Circuit Card also contains the Monitor and Control (M&C) Circuitry
responsible for:
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Programmable part setup and initialization
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Continuous control and adjustment of some functions
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Calibration
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Monitoring fault status
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Calculating and displaying measurements
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Calculations
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User monitor and control interface including front panel and remote
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Unit’s configuration and feature set
The M&C System is based on a powerful microprocessor with a large amount of Flash memory.
Several bus architectures are used to interconnect the M&C to all components of the DMD2050.
Communication to the outside world is done via connections to the remote port, terminal port,
Ethernet port, and alarm ports. The M&C runs off software programmed into its Flash memory.
The memory can be reprogrammed via the Ethernet port to facilitate changes in software.
3.0.3 Enhanced Interface Printed Circuit Card
The normal terrestrial data for the Baseband Processing Card can be re-routed to the enhanced
interface card. The enhanced interface card adds a variety of connections to the modem for
additional applications
3.1 DMD2050 Functional Block Diagram
Figure 3-4 represents the DMD2050 Functional Blocks. The modem is shown in a typical
application with customer data, Tx/Rx RF equipment and an antenna.
3.1.1 Front Panel
The Front Panel includes a 2 x 16 vacuum flourescent display, Indicator LEDs, and a Numeric
Keypad (refer to Section 4.1).
3.1.2 Baseband Processing
The Baseband Processor performs all of the functions required for an IBS/IDR Framing Unit, a
Reed-Solomon Codec, and an E1/T1 Drop and Insert System. In addition, the Baseband
Processing Section provides for transmit clock selection and rate adaptation as well as a rate
adapter and Plesiochronous/Doppler (PD) Buffer in the receive direction. A multiplexer is also
provided for the SCT Clock Source for Loop Timing Applications. The transmit and receive paths
may be configured independently under processor control.