Processor Technology Sol-PC, Manual

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PROCESSOR TECHNOLOGY CORPORATION
Sol THEORY OF OPERATION SECTION VIII
As indicated in Figure 8-4 on Page VIII-27, Subgroup Counter
U31 and Group Counter U33 are preset to a count of 3 at the start of
each horizontal scan line. U31 counts from 3 through 15 (13 charac-
ter positions) and enables U33 for one count. U31 then counts 0
through 15 and enables U33 for the second count. The sequence con-
tinues through four more groups of 16 character positions, and at
this point U33 is at its sixth count (a binary 9). Thus, pins 11 and
14 are high at pins 10 and 11 of U47. U31 continues to count from 0,
and on the ninth count (a binary 8) pin 9 of U47 goes high. The re-
sulting low on output pin 8 of U47 loads three into U31 and U33, and
the cycle repeats. The U31-U33 cycle) from preset, is then 13, 16,
16, 16, 16, 16 and 9 character position counts for a total of 102.
The QD output on pin 11 of U33 is SCAN_ADV, and the QC output
on pin 12 is HDISP. SCAN_ADV is used to generate horizontal synchro-
nization signals, and HDISP defines the start of the display portion
of the horizontal scan line.
Four outputs from U31 and the two low order outputs of U33
(pins 13 and 14) are input to the Character Address Multiplexer, U30
and U32, which supplies the low order six address bits to the Display
RAM (U14 through U21). The second address source for the Display RAM
is the Address Bus, bits ADR0-5. Address source selection is con-
trolled by the output on pin 7 of D flip-flop U75. Pin 7 of U75 goes
high when !PAGE_CC (the Display RAM) is active and !(PSYNC & !
φ
2) goes
high (which it does in the middle of PSYNC). Pin 7 of U75 remains
high for the rest of the memory access cycle.
The preset signal (pin 8 of U47) to U31 and U33 is applied to
the Scan Counter (U4O) via inverter U87. U40 counts the horizontal
scan lines that make up a row of characters and supplies the line
number to U25, the Character Generator ROM. (This ROM is discussed
later.) U40 is preset to a count of 15 for the first scan line in
the character row. It then counts from 0 through 11. On count 11,
SCAN_ENABLE on pin 8 of U47 is inverted in U87 to disable the Scan
Counter. A decoder, comprised of NAND gates U59 and U60, decodes the
13th count (count 11) in U40 and SCAN_ENABLE to supply a load pulse
to pin 9 of U40. This resets U40 to a count of 15, and the cycle re-
peats. (Presetting the Scan Counter to a count of 15 permits the
Character Generator ROM to provide a blank spacer line between char-
acter rows since line 15 in the ROM is always blank.)
The output on pin 8 of NAND gate U59, after inversion in U87,
becomes the OVERFLOW_LINE signal. This signal occurs after each
character row and appears at pins 7 and 10 of Text Counter U62 to
enable it to count. Thus, the Text Counter counts character rows.
It resets itself with its carry output (pin 15) through another in-
verter in U87, with the reset count being determined by the state on
pin 10 (VDISP) of J-!K flip-flop U43. If VDISP is low, the Text
Counter resets to a count of 0; if VDISP is high, it resets to a
count of 12.
VIII-25