manualshive.com logo in svg

Power integrations InnoSwitch3, Application Note, Page: 31 / 36

Share
Download
Power integrations InnoSwitch3 Application Note Download Page 31

Rev. A 10/18

31

Application Note

AN-72

www.power.com 

RC Network Across RFB

UPPER

In some applications where low output 

ripple voltage is required, it is necessary to 

speed up the feedback sensing by adding 

an RC phase-boost network circuit in 
parallel with upper feedback resistor.  A 
good starting value is 1 nF and 1 k

Ω

.

Diode Across SR FET 

Putting a Schottky diode across the SR FET 
may further increase efficiency by 0.1 to 
0.2% depending on the input and the 

 

SR FET used.

Capacitor Across OUTPUT VOLTAGE-

GROUND Pins 

Putting a small ceramic capacitor (up to 

 

10 

µ

F) from OUTPUT VOLTAGE to 

GROUND pins can reduce output ripple

PI-8473-100417

Secondary

Control IC

R

IS

Primary FET

and Controller

D

V

S

IS

VOUT

BPS

FB

GND

SR

BPP

FWD

InnoSwitch3

SR FET

C

F

R

F

PI-8470-100417

Secondary

Control IC

SR 

FET

R

IS

Primary FET

and Controller

D

V

S

IS

VOUT

BPS

FB

GND

SR

BPP

FWD

InnoSwitch3

Diode

Figure 25 (cont.).     Circuit Ideas to Enhance Design. 

PI-8472-100417

Secondary

Control IC

R

IS

Primary FET

and Controller

D

V

S

IS

VOUT

BPS

FB

GND

SR

BPP

FWD

InnoSwitch3

C

VOUT

Summary of Contents for InnoSwitch3

Page 1: ...nnoSwitch3 ICs enables designs that consume as little as 15 mW of no load power and makes the family ideal for applications that must meet energy efficiency standards such as the United States Department of Energy DoE 6 California Energy Commission CEC and European Code of Conduct The primary side flyback controller in InnoSwitch3 can seamlessly transition between DCM QR and CCM switching The prim...

Page 2: ...re suite available online https piexpertonline power com site login The basic configuration used in InnoSwitch3 flyback power supplies is shown in Figure 1 which also serves as the reference circuit for component identification used in the description throughout this application note In addition to this application note there is the InnoSwitch3 reference design kit RDK containing an engineering pr...

Page 3: ...hing frequency at full load FSWITCH ING_MAX B34 Enter desired reflected output voltage VOR B35 Enter core type if desired CORE B63 from drop down menu Suggested core size will be selected automatically if none is entered B63 For custom core enter CORE CODE B64 and core parameters from B65 to B72 Enter secondary number of turns B88 If any warnings are generated make changes to the design by followi...

Page 4: ... based on the product specification reduce these numbers by 6 47 Hz or 56 Hz Total Input Capacitance CAP_INPUT mF Enter total input capacitance using Table 3 for guidance Region Nominal Input Voltage VAC Minimum Input Voltage VAC Maximum Input Voltage VAC Nominal Line Frequency Hz Japan 100 85 132 50 60 United States Canada 120 90 132 60 Australia China European Union Countries India Korea Malaysi...

Page 5: ... be delivered by the power stage For example losses in the input stage EMI filter rectification etc are not processed by the power stage transferred through the transformer and therefore although they reduce efficiency the transformer design is not effected Total Losses Secondary Losses Z For designs that do not have a peak power requirement a value of 0 5 is recommended For designs with a peak po...

Page 6: ...Selection 18 PRIMARY CONTROLLER SELECTION 19 ILIMIT_MODE STANDARD STANDARD Device current limit mode 20 DEVICE_GENERIC Auto INN31X5 Generic device code 21 DEVICE_CODE INN3165C Actual device code 22 POUT_MAX 22 W Power capability of the device based on thermal performance 23 RDSON_100DEG 3 47 Ω Primary MOSFET on time drain resistance at 100 degC 24 ILIMIT_MIN 0 88 A Minimum current limit of the pri...

Page 7: ...eter is the switching frequency at full load at minimum rectified AC input voltage The maximum switching frequency of InnoSwitch3 in normal operation is 100 kHz and the typical overload detection frequency of is 110 kHz In normal operating condition the switching frequency at full load should not be close to the overload detection frequency The programmable switching frequency range is 25 to 95 kH...

Page 8: ...ue depends on the specific application and is based on a compromise between the factors mentioned above Mode of Operation KP KP is a measure of how discontinuous or continuous the mode of switching is KP 1 is said to be in discontinuous operation DCM while KP 1 denotes continuous operation CCM Ripple to Peak Current Ratio KP Below 1 indicating continuous conduction mode KP is the ratio of ripple t...

Page 9: ...A value of 7 is used by default however if specific information is provided from the transformer vendor then this may be entered in the grey override cell A value of 7 helps to reduce unit to unit variation and is easy to meet for most magnetics vendors A value of 3 will help improve production tolerance further but will be more challenging to vendors The other important electrical parameters are ...

Page 10: ...rns 76 BPEAK 3125 Gauss Peak flux density 77 BMAX 2844 Gauss Maximum flux density 78 BAC 933 Gauss AC flux density 79 ALG 140 nH turns 2 Typical gapped core effective inductance 80 LG 0 310 mm Core gap length 81 LAYERS_PRIMARY 4 4 Number of primary layers 82 AWG_PRIMARY 30 AWG Primary winding wire AWG 83 OD_PRIMARY_INSULATED 0 303 mm Primary winding wire outer diameter with insulation 84 OD_PRIMAR...

Page 11: ...urns for the main winding of the transformer calculated based on VOR and Secondary Turns Peak Flux Density BPEAK Gauss A maximum value of 3800 gauss is recommended to limit the peak flux density at max current limit and 132 kHz operation Under an output shorted condition the output voltage is low and little reset of the transformer occurs during the MOSFET off time This allows the transformer flux...

Page 12: ...when switching the line overvoltage hysteresis IOV H level is reached Line OV voltage is approximately equal to IOV RLS1 RLS2 1 414 Rectified Bias Voltage VBIAS A default value of 12 V is assumed The voltage may be set to different values for example for applications when the bias winding output is also used as a non isolated primary side auxiliary output Higher voltages typically increase no load...

Page 13: ...edback Resistor RFB_UPPER The RFB_UPPER resistor value is calculated based on VOUT and the nominal internal reference voltage of the IC 1 265 V Upper Feedback Resistor RFB_LOWER The RFB_LOWER resistor is calculated based on VOUT and the 1 265 V internal reference voltage The value will change if the specified value is used for the RFB_UPPER resistor Lower Feedback Resistor Decoupling Capacitor CFB...

Page 14: ...8 RDSON_SRFET2 NA mΩ SRFET on time drain resistance at 25degC and VGS 4 4V for output 2 159 160 OUTPUT 3 161 VOUT3 0 00 V Output 3 voltage 162 IOUT3 0 00 A Output 3 current 163 POUT3 0 00 W Output 3 power 164 IRMS_SECONDARY3 0 00 A Root mean squared value of the secondary current for output 3 165 IRIPPLE_CAP_OUTPUT3 0 00 A Current ripple on the secondary waveform for output 3 166 AWG_SECONDARY3 0 ...

Page 15: ...rimary inductance corner to be evaluated 186 MODE_OPERATION CCM Mode of operation 187 KP 0 728 Measure of continuous discontinuous mode of operation 188 FSWITCHING 67267 Hz Switching frequency at full load and valley of the rectified minimum AC input voltage 189 DUTYCYCLE 0 433 Steady state duty cycle 190 TIME_ON 6 44 us Primary MOSFET on time 191 TIME_OFF 8 43 us Primary MOSFET off time 192 IPEAK...

Page 16: ...s a supply decoupling capacitor for the secondary side controller A surface mount 2 2 mF 25 V multi layer ceramic capacitor is recommended for satisfactory operation of the IC The SECONDARY BYPASS Pin voltage needs to reach 4 4 V before the output voltage reaches its target voltage A significantly higher BPS capacitor value could lead to output voltage overshoot during start up Values lower than 1...

Page 17: ...Resistor RSN bleeds off energy stored inside the capacitor CSN Power supplies using different InnoSwitch3 devices in the family will have different peak primary current leakage inductances and therefore leakage energy Capacitor CSN and resistors RSN and RS must therefore be optimized for each design As a general rule it is advisable to minimize the value of capacitor CSN and maximize the value of ...

Page 18: ...f RBP R V V I V V 5 3 BP BIAS NO LOAD BPP SSW BPP h 6 Output Synchronous Rectifier MOSFET SR FET InnoSwitch3 features a built in synchronous rectifier SR driver that enables the use of low cost low voltage MOSFETs for synchronous rectification and increases system efficiency Since the SR driver is referenced to the output GND the SR FET is placed in the return line GND is the typical threshold tha...

Page 19: ...hows long SR FET conduction time of 3 5 ms secondary turns ratio of the transformer The spreadsheet provides this estimate on line 137 as VREVERSE_RECTIFIER1 This voltage should still be measured to confirm sufficient margin for the BVDSS of the SR FET and the antiparallel diode if used The SR FET provides significant efficiency improvement without a cost penalty due to the reduced prices of low v...

Page 20: ...ould be greater than the calculated value in the spreadsheet IRIPPLE_CAP_OUTPUT1 However in designs with high peak to continuous average power and for those with long duration peak load conditions the capacitor rating may need to be increased Selection in this one should be based on the measured capacitor temperature rise under worst case load and ambient temperature conditions The spread sheet ca...

Page 21: ...eral selecting a high ripple current rated capacitor results in an acceptable value of ESR The voltage rating of the capacitor should be at least 1 2 times the output voltage VOUT Output Current Sense Resistor RIS For constant current CC output operation the external current sense resistor RIS should be connected between the IS pin and secondary GROUND pin of the IC If constant current CC regulati...

Page 22: ...adapter designs 7 The part is board mounted with SOURCE pins soldered to a sufficient area of copper and or a heat sink to keep the SOURCE pin temperature at or below 110 C 8 Ambient temperature of 50 C for open frame designs and 40 C for sealed adapters is assured 9 To prevent reduced power delivery due to premature termination of switching cycles a transient KP limit of 0 5 is used This prevents...

Page 23: ... An OVP for a 5 V output can be implemented by two diodes in series shown in Figure 18 c The filter capacitor should be rated for 6 3 V Recommendations for Circuit Board Layout Single Point Grounding Use a single point ground connection from the input filter capacitor to the area of copper connected to the SOURCE pin See Figures 19 and 20 Bypass Capacitors The PRIMARY BYPASS CBPP SECONDARY BYPASS ...

Page 24: ... Output SR MOSFET For best performance the area of the loop connecting the secondary winding the output SR MOSFET and the output filter capacitor should be minimized In addition sufficient copper area should be provided at the terminals of the SR MOSFET for heat sinking The distance between SR FET source and InnoSwitch3 GROUND pin needs to be short To prevent negative current flowing through the p...

Page 25: ...round impedance coupled noise PI 8522 091318 Primary loop 1 formed by C2 NP and D S pin is compact and small Optional Y capacitor connected to RTN and C1 Note that Drain trace is short and narrow 5 5 mm spark gap primary side is connected directly to the AC input after the fuse while secondary side has one from RTN and VOUT to increase effectiveness Output loop 5 formed by CPF RIS and COUT does no...

Page 26: ... www power com Figure 22 TOP Side Layout Example Showing Through Hole Components Safety Y Capacitor Transformer Thermistor Fuse AC Input AC Input Output Terminals Input Filter Capacitors EMI Filter Inductor Output Capacitor PI 8521 103117 ...

Page 27: ...eath the InSOP package is generally not recommended as this weakens the PCB In the case of a long PCB it is recommended that mechanical support or post be placed in the middle of the board or near the InSOP package Figure 23 Recommended Position of InSOP 24D Package Shown with Check Mark 23 a 23 c 23 b 23 d Supporting Stand Off PI 8523 020618 Supporting Stand Off Force InSOP 24D Transformer Suppor...

Page 28: ...ned 8 mm between the primary side and secondary side circuits especially underneath InSOP package and transformer a It is not recommended to place spark gap near or across InSOP package 2 Use two spark gaps connected to secondary terminals output return and positive and one of the AC inputs after the fuse see Figure 21 In this configuration at least 5 4 mm gap is often sufficient to meet creepage ...

Page 29: ...r FET Mylar 0 4 mm Heat Sink 0 5 mm Thermal Pad 0 4 mm 6 6 mm 4 2 mm InnoSwitch3 InSOP 24D InSOP 24D d 4 2 mm Heat Sink d 6 6 mm d 6 6 mm d 6 6 mm Mylar 0 4 mm Thermal Pad InSOP 24D Figure 24 Simplified Diagram of Heat Spreader Attachment to an InSOP 24D Package spikes at start up Repeat tests under steady state conditions and verify that the leading edge current spike is below ILIMIT MIN at the e...

Page 30: ...ds thus disabling OV function of the IC Fast AC Reset for IC with OV Latch Function Diode allows VOLTAGE pin to monitor line voltage for OV UV detection A capacitor is sized to filter the line ripple CS must be small to allow the VOLTAGE pin to discharge fast enough to go below the IUV threshold in order to reset the latch PI 8403 081617 D V R1 R2 1N4148 S IS VOUT BPS FB GND SR BPP FWD InnoSwitch3...

Page 31: ...o 0 2 depending on the input and the SR FET used Capacitor Across OUTPUT VOLTAGE GROUND Pins Putting a small ceramic capacitor up to 10 mF from OUTPUT VOLTAGE to GROUND pins can reduce output ripple PI 8473 100417 Secondary Control IC RIS Primary FET and Controller D V S IS VOUT BPS FB GND SR BPP FWD InnoSwitch3 SR FET CF RF PI 8470 100417 Secondary Control IC SR FET RIS Primary FET and Controller...

Page 32: ...output voltage and high output filter capacitance Capacitor Across Current Sense RIS Putting a capacitor 10 100 nF across IS and GND pins when RIS is placed some what away from the IC will reduce pulse grouping bunching in CC operation Figure 25 cont Circuit Ideas to Enhance Design PI 8469 101017 Secondary Control IC Primary FET and Controller Diode D V S IS VOUT BPS FB GND SR BPP FWD InnoSwitch3 ...

Page 33: ... output power delivery at 90 VAC input and Resistors R6 R7 and R8 provide line voltage sensing At approximately 100 V DC the current through these resistors exceeds the line undervoltage threshold which enables U1 At approximately 420 V DC the current through these resistors exceeds the line overvoltage threshold disabling U1 A low cost RCD clamp formed by D1 R3 R4 and C3 limits the peak drain vol...

Page 34: ... Higher than 84 efficiency at 90 VAC input at full load is achieved using INN3672C from the InnoSwitch3 EP family and provides accurate cross regulation between two outputs with two SR FETs Primary side overvoltage protection is obtained using Zener diode VR1 In the event of overvoltage occurred on any output the increased voltage at the output of the bias winding causes the Zener diode VR1 to con...

Page 35: ...Rev A 10 18 35 Application Note AN 72 www power com Notes ...

Page 36: ...wer Integrations logo CAPZero ChiPhy CHY DPA Switch EcoSmart E Shield eSIP eSOP HiperPLC HiperPFS HiperTFS InnoSwitch Innovation in Power Conversion InSOP LinkSwitch LinkZero LYTSwitch SENZero TinySwitch TOPSwitch PI PI Expert SCALE SCALE 1 SCALE 2 SCALE 3 and SCALE iDriver are trademarks of Power Integrations Inc Other trademarks are property of their respective companies 2018 Power Integrations ...

Reviews:

No comments