Rev. A 10/18
19
Application Note
AN-72
www.power.com
An SR FET with 18 m
Ω
R
DS(ON)
is appropriate for a 5 V, 2 A output, and
a SR FET with 8 m
Ω
R
DS(ON)
is suitable for designs rated with a 12 V,
3 A output.
The recommended optimum SR FET Drain-to-Source on-resistance
(R
DS(ON)
) is approximately,
.
R
I
VOR
V
O
0 16
DS ON
P
#
#
c
^
h
Some SR FETs, suitable for synchronous rectification and which meet
the criteria described in this section is shown in Table 10.
The voltage rating of the SR FET should be at least 1.3 times the
expected peak inverse voltage (PIV). The peak inverse voltage is the
applied maximum input DC bus voltage multiplied by the primary to
Figure 16. Effect of R
DS(ON)
on SR FET Conduction Time.
R
DS(ON)
= 7.5 m
Ω
Shows short SR FET conduction time of 2.5
µ
s.
R
DS(ON)
= 16 m
Ω
Shows long SR FET conduction time of 3.5
µ
s.
secondary turns ratio of the transformer. The spreadsheet provides
this estimate on line 137 as VREVERSE_RECTIFIER1. This voltage
should still be measured to confirm sufficient margin for the BV
DSS
of
the SR FET and the antiparallel diode (if used).
The SR FET provides significant efficiency improvement without
a
cost penalty due to the reduced prices of low voltage MOSFETs. It is
permissible to use a Schottky or fast-recovery diode for output
rectification, by shorting gate drive SYNCHRONOUS RECTIFIER pin to
ground. This may be preferred for high-voltage output.
The DC current rating of MOSFET needs to be >2 higher
than the
average output current. Depending on the temperature rise and the
duration of a peak load condition, it may be necessary to increase the
SR FET current rating and heat dissipation area once the prototype
has been built.
t
ON
= ~3.5
µ
s
PI-8515-050918
V
GS
I
DS
V
DS
t
ON
= 2.5
µ
s
V
GS
I
DS
V
DS
PI-8516-050918
5.1
µ
s
((