BIOS Setup Information
ROBO-638 User’s Manual
4-9
This option controls the number of SCLKs for RAS# precharge. If your system
installs good quality of SDRAM, you can set this option to “2 SCLKs” to obtain
better memory performance.
SDRAM CAS# Latency
This option controls the number of SCLKs between the time a read command is
sampled by the SDRAMs and the time the North Bridge, 82443BX, samples
correspondent data from the SDRAMs. For a registered DIMM with CAS# Latency
= 2, this option should be set to “2 SCLKs” to acquire better memory performance.
SDRAM Leadoff Cmd Timing
This option is used to control when the SDRAM command pins (SRASx#, SCASx#
and Wex#) and CSx# are considered valid on leadoffs for CPU cycles. If you select
Auto
, this timing will be automatically initialized and set by BIOS from CPU speed
detection. For Desktop platforms, it might be set to
4 SCLKs
. In general, another
option
3 SCLKs
will be set to meet Mobile platforms.
DRAM Integrity Mode
There are three options
Non-ECC
,
EC-Only
(Error Check Only) and
ECC
Hardware
(Error Checking and Correction) in this feature. The DRAM integrity
mode will be implemented by the parity algorithm when this option is set to
“Non-ECC”.
DRAM Refresh Rate
This option specifies the refresh rate frequency for the installed system memory
SDRAM DIMMs. If you have good quality of DRAM, you can choose longer
refresh rate to get better system performance.
Memory Hole
This option allows the end user to specify the location of a memory hole for
memory space requirement from ISA-bus cards.
Graphics Aperture Size