27
Programmable Logic Controller (PLC)
Pb1Spare
Input
Channel #2 Pixel Bus Spare Input signals.
For one-channel products, this input is tied to zero.
GpioIn[7:0]
Input
GPIO Input lines. Unused most significant bits are tied to zero.
BufferWM0
Input
Channel #1 Grabber Water Mark Almost Full Status
BufferWM1
Input
Channel #2 Grabber Water Mark Almost Full Status
For one-channel products, this input is tied to zero.
Grb0AcqActive
Input
Channel #1 Grabber Acquisition Active Status
Grb1AcqActive
Input
Channel #2 Grabber Acquisition Active Status
For one-channel products, this input is tied to zero.
PlcCascIn[1:0]
Input
PLC Cascade Input signals. Allow to connect up to two outputs of
another instance of a PLC in the IP Engine. When there is no other
PLC, these inputs are tied to zero.
PlcCtrl[3:0]
Input
PLC Control signals. These signals are coming from registers,
directly controllable through software (host).
Pb0CC[3:0]
Input, Output
Channel #1 Pixel Bus Camera Control Output signals
CC[4:1] for a Camera Link-type bus.
Pb1CC[3:0]
Input, Output
Channel #2 Pixel Bus Camera Control Output signals. TCC for a
Camera Link-type bus
For one channel products, these outputs are left unconnected.
GpioOut[7:0]
Input, Output
GPIO Output lines. Unused most significant bits are left
unconnected.
PlcFval[1:0]
Input, Output
PLC Frame Valid signal. Signal to be routed to grabber FVAL
external input. PLC_FVAL0 is for channel #1. PLC_FVAL1 is for
channel #2 if two channels product, otherwise left unconnected.
PlcLval[1:0]
Input, Output
PLC Line Valid signal. Signal to be routed to grabber LVAL external
input. PLC_LVAL0 is for channel #1. PLC_LVAL1 is for channel #2
if two channels product, otherwise left unconnected.
PlcMval[1:0]
Input, Output
PLC Metadata Valid signal. Signal to be routed to grabber MVAL
external input. PLC_MVAL0 is for channel #1. PLC_MVAL1 is for
channel #2 if two channels product, otherwise left unconnected.
PlcTrig[1:0]
Input, Output
PLC Trigger signal. Signal to be routed to grabber TRIG external
input. PLC_TRIG0 is for channel #1. PLC_TRIG1 is for channel #2
if two channels product, otherwise left unconnected.
PlcTimestampCtrl
Input, Output
PLC Timestamp Control signal. Signal to be routed to
PT_TIMESTAMP module. It can be used to reset the timestamp or
to set it to a user-configured value, if supported.
Table 9: PLC Signal Descriptions
Primary Signal
Name
PLC Equation
Usage
Description
Summary of Contents for iPORT CL-Ten
Page 8: ...4 iPORT Advanced Features User Guide...
Page 12: ...8 iPORT Advanced Features User Guide...
Page 38: ...34 iPORT Advanced Features User Guide...
Page 52: ...48 iPORT Advanced Features User Guide 6 In the ChunkSelector list select PixelBusMetadata...
Page 55: ...51 Extended Chunk Mode Support 3 In the ChunkEnable list click True...
Page 56: ...52 iPORT Advanced Features User Guide...
Page 72: ......