18
DJM-850-K
1
2
3
4
A
B
C
D
E
F
1
2
3
4
5. DIAGNOSIS
5.1 POWER ON SEQUENCE
Reset
Reset
FPGA_xPGM setting to LO
W
FPGA_xPGM setting to HIGH
Starting FPGA configuration
FPGA_xI
N
IT setting to HIGH
Accepting FPGA configuration
Loading data into FPGA
FPGA_DO
N
E setting to HIGH
Completion of FPGA configuration
Canceling reset
Starting power supply to FL
Canceling reset
N
EC_B_CTRL setting to LO
W
Inhibiting and cancelling
SUB UCOM from accessing FPGA
N
otifying of version
(Initialization completion)
Obtaining KEY data
N
otifying of operation mode
MAI
N
UCOM
Program start
MUTE setting O
N
SUB UCOM
USB UCOM
FPGA
Fail-safe state acquisition
(Internal ROM / FLASH)
DSP
Starting power supply to the peripheral ICs
Program start
Operation mode judgment
Canceling reset of MAI
N
Flash
System initialization
power supply, voltage check
FPGA_xI
N
ITstandby HIGH
FPGA_DO
N
E standby HIGH
DPRAM validation
Loading of setup data
DIT, DAC reset cancel
A
