PCM-065/phyCORE-i.MX8X System on Module
L-864e.A1
© PHYTEC America LLC, 2021
6
List of Tables
Table 1. Abbreviations and Acronyms used in this Manual ............................................................................. 10
Table 2. Signal Types Used in this Manual ..................................................................................................... 11
Table 3. Technical Specifications ................................................................................................................... 20
Table 4. Recommended Operating Conditions for the Input and Output Power Domains ............................... 21
Table 5. Voltage Domain Configurations ........................................................................................................ 23
Table 6. Solder Jumper Settings ..................................................................................................................... 24
Table 7. phyCORE-i.MX8X Connector X1, Column A Pinout .......................................................................... 29
Table 8. phyCORE-i.MX8X Connector X1, Column B Pinout .......................................................................... 30
Table 9. phyCORE-i.MX8X Connector X1, Column C Pinout .......................................................................... 32
Table 10. phyCORE-i.MX8X Connector X1, Column D Pinout ........................................................................ 33
Table 11. Reset Pin Description ..................................................................................................................... 36
Table 12. External Supply Voltages ................................................................................................................ 37
Table 13. Internal Voltage Rails ...................................................................................................................... 37
Table 14. eMMC Signal Connections to the Processor ................................................................................... 38
Table 15. NAND Signal Connections to the Processor ................................................................................... 39
Table 16. OSPI0 Connections at the phyCORE-Connector ............................................................................ 40
Table 17. MMC1 Connections at the phyCORE-Connector ............................................................................ 40
Table 18. BOOTMODE Description ................................................................................................................ 41
Table 19. FlexCAN Connections at the phyCORE-Connector......................................................................... 42
Table 20. Ethernet Connections at the phyCORE-Connector ......................................................................... 42
Table 21. Ethernet PHY Default Strapping Configuration ................................................................................ 44
Table 22. Connections at the phyCORE-Connector ........................................................................................ 44
Table 23. MLB Connections at the phyCORE-Connector ............................................................................... 45
Table 24. PCIe Connections at the phyCORE-Connector ............................................................................... 45
Table 25. SAI0 Connections at the phyCORE-Connector ............................................................................... 45
Table 26. SAI1 Connections at the phyCORE-Connector ............................................................................... 46
Table 27. SAI2 Connections at the phyCORE-Connector ............................................................................... 46
Table 28. SAI3 Connections at the phyCORE-Connector ............................................................................... 46
Table 29. MCLK Connections at the phyCORE-Connector ............................................................................. 46
Table 30. ESAI0 Connections at the phyCORE-Connector ............................................................................. 46
Table 31. SPDIF Connections at the phyCORE-Connector ............................................................................ 47
Table 32. SPI Connections at the phyCORE-Connector ................................................................................. 47
Table 33. UART Connections at the phyCORE-Connector ............................................................................. 48
Table 34. USB0 SS3 Connections at the phyCORE-Connector ...................................................................... 48
Table 35. USB0 OTG Connections at the phyCORE-Connector ..................................................................... 49
Table 36. USB1 OTG Connections at the phyCORE-Connector ..................................................................... 49
Table 37. M4F Connections at the phyCORE-Connector ................................................................................ 50
Table 38. PWM Connections at the phyCORE-Connector .............................................................................. 50
Table 39. JTAG Connections at the phyCORE-Connector .............................................................................. 51
Table 40. UART Connections at the phyCORE-Connector ............................................................................. 51
Table 41. LVDS/MIPI Connections at the phyCORE-Connector ..................................................................... 52
Table 42. Parallel Display Connections at the phyCORE-Connector .............................................................. 53
Table 43. MIPI CSI Connections at the phyCORE-Connector......................................................................... 54
Table 44. Parallel Camera Connections at the phyCORE-Connector ............................................................. 54
Table 45. ADC Connections at the phyCORE-Connector ............................................................................... 55
Table 46. FlexTimer Signals ........................................................................................................................... 55
Table 47. Total Available GPIO ...................................................................................................................... 55
Table 48. GPIO0 Accessibility at phyCORE-Connector .................................................................................. 56
