EN 93
7.
LX7500R
Circuit Diagrams and PWB Layouts
CDEC
VCO1
VCO2
VDE_EM
QSS
TAGC
STD
LADJ
CBL
VP
CVBS
AF
AFC
SF1
VIF2
VIF1
GND
TOP
TPLL
CSAGC
CVAGC
FMIN
CDE_EM
SF2
O
GND
I
I
O2
IGND
O1
GND
O
GND
I
I
O2
IGND
O1
GND
I
O2
ISWI
O1
GND
VIF1
GND
TOP
TPLL
CSAGC
CVAGC
FMIN
CDE_EM
CDEC
VCO1
VCO2
VDE_EM
QSS
TAGC
SF2
NC
VP
CVBS
AF
AFC
SF1
VIF2
M
L
L
H
M
H
PLL
TDA9817
TDA9817
--
TPS 6,0 MHz
I701 B2
I702 B6
I709 E9
I711 E8
I712 E8
I715 E1
I716 E1
1704
5V
0
0
--
2737 E15
270R
3702 A2
3703 A2
3704 E3
3705 C14
3710 F10
B/G
3720 F8
3724 F9
3725 B13
3726 C5
3728 D13
3730 D5
3731 F13
7710
330R
1
270R
0
I704 C5
I706 E6
I707 D8
I708 D7
I739 H6
I742 D5
I743 E7
I744 E7
I745 A8
I717 F10
I721 F11
I723 F15
I724 E14
I725 F13
--
--
0R
3733 G4
L
D/K
H
I
A
B
2740 F7
2741 F4
2742 F11
3701 A7
G
H
I
1701 C7
1702 E7
3711 A3
3714 B12
3715 B13
3716 B5
0
3732 E15
I726 E8
delete f
or MSTD
I733 E2
I734 E1
I735 E1
4
5
6
7
8
I746 E11
I748 D11
I749 D12
A
GC-ADJUST
3717 D12
14
E
F
G
4
5
6
7
C
D
E
F
12
13
14
15
A
1703 D7
1704 F14
1705 C1
I751 D13
from IO
V
delete for MSTD
1
1
I
2720 B3
2721 B5
2722 F8
2723 F8
1
2
3
2729 C9
2730 E8
2731 D11
2732 E3
2733 E2
9
10
11
G3956M
--
MULTISTD (/39)
0R
12
13
15
1
2
3
1
8
9
10
11
3737 E6
3738 E6
3739 F8
3740 F11
3741 D14
B
C
D
TDA9818
1703
PSS
TPS 5,5 MHz
lo
w leaka
g
e
L’
*
1706 F14
2713 A2
2719 B5
3745 H5
3746 H6
3758 G6
4700 D4
2724 B12
2725 D3
2727 F10
2728 C9
5705 B3
5709 C10
5710 B6
5711 D12
5713 D13
2734 D4
2735 E1
2736 E2
for MSTD only
3734 F15
3735 F14
3736 F15
6705 F5
7701 G11
7702 D14
7704 C6
3742 F6
3743 G8
3744 G8
0
7709
not used
PAL I (/07)
AFC-ADJUST
4701 G5
5701 E1
5702 E1
5704 A1
7713 D12
7714 H6
7716 D14
7717 G8
F701 D1
5714 G14
6703 C5
6704 D5
for MSTD only
PAL BG (/01)
1
* VERSION TABLE
G3956M
F710 D3
F713 H5
SB1
1
for MSTD only
7705 D6
7706 H6
7709 B10
4701
--
from IO
V
--
3731
TPS 5,5 MHz
I727 E7
I728 E11
I729 E5
I730 F5
7710 D11
7711 E14
7712 H4
placed on some pos. as 7710
Pos.
to MSP
*
F702 C10
F703 C6
F704 A4
4700
0R
--
1706
F707 D1
F708 B12
F709 C6
0
1
for P
AL-I only
for MSTD only
N750
*
K3953M
*
SFS_TS
0
40,4-ADJUST
*
0R
I731 H4
I732 B3
I754 D13
1
4K7
3716
I742
220p
2719
I731
470R
3702
3717
4K7
I711
PDTC124EU
7704
F710
2730
220n
220R
3704
2u2
2732
7701
PDTC124EU
2
1
3
I744
TPSRD
1706
6M0
I716
I704
7706
PDTC124EU
I708
I724
I701
5SW
I728
F701
6704
BA591
5SW
2K2
3737
3731
270R
F703
18
19
9
1
2
21
I730
13
20
7
12
23
24
3
14
22
6
8
17
15
11
10
5
4
16
TDA9818T
7709
Φ
5702
47u
2737
I702
6u8
6705
BA591
5705
100R
3728
3734
2K7
18K
3714
I729
5704
7714
BC847BW
100n
2727
3743
56K
22K
3724
3739
5K6
2720
100u
33VSTBY
I754
4K7
3730
5SW
PDTC124EU
7705
33K
3711
3736
330R
3746
F709
5K6
1n0
2741
100R
3726
5M5
TPSRA
1704
2
1
3
3740
680R
I749
5SW
2723
470p
15u
5713
10K
3715
2740
2u2
100n
2733
I735
I706
2734
1n0
3
1
2
5
4
1703
OFWG3956M
38M9
I712
5SW
3705
10K
F708
2742
1n0
I748
I746
F713
4700
5SW
I707
BA591
6703
5
4
150K
3703
OFWK9656M
38M9
3
1
2
BC857BW
7716
1702
15u
I721
5714
I751
2u2
2722
5SW
I709
I725
22p
2725
I739
3742
4K7
1
2
5
4
F704
1701
OFWK3953M
38M9
3
I727
PDTC124EU
7702
I715
I723
I726
5SW
4K7
3741
5701
2728
10n
F702
5SW
7711
BC857BW
3758
10K
3710
5K6
2
21
3720
330R
15
12
23
24
14
22
6
18
19
9
1
17
11
10
5
4
16
13
20
3
7
Φ
7710
TDA9817T
8
22u
2713
5SW
3744
100K
3735
3K3
5SW
3725
8K2
I734
2729
10u
2731
8p2
3701
680R
I733
I743
2736
27p
F707
3733
4K7
15
MT4
6
NC1
4
SCL
5
SD
A
2
TU
VS
7
VST
9
8
1
AG
C
3
AS
IF1
11
IF2|NC2
10
12
MT1
13
MT2
14
MT3
7
8
UV1316-MK3
1705
ADC
7KMY 5711
1
2
3
4
6
4701
7717
BC847CW
120p
2721
I732
7712
PDTC124EU
100n
2724
1K0
3732
I717
I745
8
5709
6u8
5710
7KMY
1
2
3
4
6
7
3745
5K6
27p
2735
5SW
BC857BW
7713
3738
6K8
SIF1
SB1
SFS_TS
SDASW
SCLSW
5SW
SB1
SB1
AG
C
VFV
AFC
PSS
ANALOG BOARD
Frontend Video (FV)
A/V board LX7500R, 231104
4
OSCILLOGRAMS
..
..V MEASURED IN RECORD MODE
..V MEASURED IN PLAYBACK MODE
2V
3,5V
0,7V
3,3V
0,9V
2,8V
3,2V
3,3V
2,5V
3V
3,2V
3,1V
2,7V
5,2V
2,7V
2V
0V
VFV I723
A: DC, 500mV/Div
10us/Div