Circuit-, IC descriptions and list of abbreviations
EN 146
LX7500R
9.
IC7703 ADV7196A, Digital Board 2.1 Chrysalis, Progressive Scan Video Encoder
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
SO–8
PIN SYMBOL
FUNCTION
1
V
CC
Power supply input.
2
PWRGD
Open collector output goes low when V
FB
is out of regulation. User
must externally limit current into this pin to less than 20 mA.
3
PGDELAY
External capacitor programs PWRGD low–to–high transition delay.
4
COMP
Error amp output. PWM comparator reference input. A capacitor to
LGND provides error amp compensation and Soft Start. Pulling pin
< 0.45 locks gate outputs to a zero percent duty cycle state.
5
GATE(H)
High–side switch FET driver pin. Capable of delivering peak currents
of 1.5 A.
6
GATE(L)
Low–side synchronous FET driver pin. Capable of delivering peak
currents of 1.5 A.
7
V
FB
Error amplifier and PWM comparator input.
8
GND
Power supply return.
FUNCTIONAL BLOCK DIAGRAM
CGMS
MACROVISION
SHARPNESS
FILTER CONTROL
AND
ADAPTIVE
FILTER CONTROL
TEST PATTERN
GENERATOR
AND
DELAY
AND
GAMMA
CORRECTION
Y0–Y9
Cr0–Cr9
Cb0–Cb9
CHROMA
4:2:2
TO
4:4:4
(SSAF)
2
INTER-
POLATION
TIMING
GENERATOR
SYNC
GENERATOR
I
2
C MPU
PORT
CLKIN
HORIZONTAL
SYNC
VERTICAL
SYNC
BLANKING
RESET
ADV7196A
DAC CONTROL
BLOCK
DAC A (Y)
DAC B
DAC C
V
REF
RESET
COMP
11-BIT+
SYNC
DAC
11-BIT
DAC
11-BIT
DAC
LUMA
SSAF
CHROMA
4:2:2
TO
4:4:4
(SSAF)
