1. Network Management Specification
104
June 2004
8000-A2-GB30-30
9. Timing and Clocking
9.1
Paradyne enterprise clock source MIB (pdn_Config.mib )
The devConfigClockSrcTable provides the capability of choosing a primary and a
secondary clock source
9.1.1
devCfgClkWhichSrc
The devCfgClkWhichSrc object the following two values:
•
primary(1), this chooses the primary master clock source entry
•
secondary(2), this chooses the secondary master clock source entry
•
tertiary(3), this chooses the tertiary master clock source entry.
9.1.2
devCfgClkSource
The mpeDevCfgClkSource object is used to select the source for the master clock for the
device. The source selected provides synchronization for all the timing within the device.
The following values are supported ‘read-write’ by the BAC.
•
internal(1), Master clock is the internal clock,
•
interface(3), Clock source is provided via an interface,
(default)
•
external(2), Master clock is the external clock source 1,
•
external2(5), Master clock is the external clock source 2
9.1.3
devCfgClkIfIndex
If devCfgClkSource is set to interface(3), this object is used to select the interface to be used
as the source for the master clock.
9.1.4
devCfgClkRate
If devCfgClkSource is set to external (2) or external2 (5), this object allows to configure the
clock rate to one of the following values:
•
rate400Hz(1),
•
rate8KHz(2),
•
rate64KHz(3),
•
rate1544KHz(4),
•
rate2048KHz(5)
Table 1-127. devConfigClockSrcEntry
Table
Object
Type
Access
Supported
devConfigClockSrcEntry
devCfgClkWhichSrc INTEGER
read-only
Yes
devCfgClkSource
INTEGER
read-write
Yes
devCfgClkIfIndex
INTEGER
read-write
Yes
devCfgClkRate
INTEGER
read-write
Yes
