Panasonic PANAFAX DF-1100, Service Manual

Page: 235 / 333

System Description
6–39
In the actual circuit, the fixed output voltages are obtained by changing the winding ratio of transformer T101.
In this converter circuit, the output voltages are stabilized by controlling the duty cycle of the ON and OFF
timing of the transistor. In this power supply, the bias winding is built into the transformer. The power supply
has three outputs, +24 VDC, –12 VDC and +5 VDC. The +24 VDC output is protected by the Error Detection
Circuit, and the +5 VDC and –12 VDC outputs are protected by the circuitry inside of the voltage regulator
IC.
Control Circuit and Error Detection Circuit
The control circuit amplifies the output of the duty cycle according to the error voltage detected by the Error
Detection Circuit, and drives the main transistor Q102. The method used to change the duty cycle is to
change the ON time period. When the output voltage of the +24 VDC circuit rises, the current of photocoupler
PC101 increases, the output pulse width of the control circuit decreases and the ON time period of Q102
decreases. This control circuit decides the minimum OFF time period by itself. When the oscillation
frequency becomes higher and the OFF time period becomes minimum, the OFF time period remains
unchanged and only the ON time period decreases. This way, there is a upper limit of the oscillation
frequency and the duty cycle is expanded.
Over Current Limiter
The +24 VDC output is limited by Ton MAX Limiter (ON time period of transistor Q102) which is part of the
control circuit. The +5 VDC and –12 VDC outputs have over current limiters provided inside the voltage
regulator.