6-8
TECHNICAL DATA
Orban Model 6200
zation occurs every time the unit is powered up and when there is a processing al-
gorithm change. It is controlled by the Z-180 via pin 2 of latch IC611. The 48kHz
clock is also used, along with IC313, in the A/D clock synchronizing circuit. This
circuit makes the IRQB and the L/R clocks, both operating at 48kHz, phase syn-
chronous. This ensures that the process-to-output buffer transfer internal to the
DSP doesn't overlap the output buffer-to-peripheral transfer.
AC terminations are used on various clocks throughout the board to improve sig-
nal integrity for sensitive devices.
Control Circuits
The control circuits process and execute user-initiated requests to the system. The source
of these requests is the front panel buttons, the rear panel RS-232 port, and the remote
contact closures (6200 OPTIMOD-DAB only). These changes affect hardware function
and/or DSP processing. The control circuits also send information to the LCD display,
LED status, and LED meter circuits. A RAM chip stores code segments. For quick ac-
cess, an EEPROM chip stores dynamic system state information. A ROM chip contains
the executable form of 6200 DSP and Control software.
1
Microprocessor and Power Monitoring Circuit
A Z-180 microprocessor executes software code required to control the functionality of
the 6200. The EXTAL pin of the Z-180 receives an 18.432MHz clock signal from the
clock divider/PLL circuit and is internally divided down to 9.216MHz to provide the Z-
180 system clock frequency. ROM contains control software for the Z-180. User system
setup and other dynamic system state information that must survive power down is
stored in non-volatile EEPROM. Power monitoring circuitry prevents data corruption by
placing and holding the Z-180 in reset if AC mains power is insufficient.
The Z-180 communicates to the DSP through the synchronous serial data host port.
When the DSP requires executable code, the Z-180 reads it from the ROM and sends it
to the DSP. The Z-180 sends parameter control data to the DSP and receives status data
from the DSP. If status from DSP is irregular, the Z-180 will place the 6200 hardware
and DSP in a reset state and execute initialization procedures.
Component-Level Description:
The Z-180 is IC100. Watchdog timer/voltage monitor IC122 provides the system
reset function. IC122 pin 7 monitors pulses generated every 1 second by the Z-
180. If the Z-180 is not operating correctly to provide the pulses, IC122 will reset
the Z-180. IC122 also monitors the voltage on the +5V source that supplies power
to the 6200 digital electronics. When the +5V line is above the minimum operat-
ing voltage of +4.75V, R103 will pull
RESET
high which allows the Z-180 to exit
the reset condition. When the +5V line is below the minimum operating voltage,
the open-collector output of IC122 pulls Z-180's
RESET
low which puts the Z-180
into the reset condition, thereby preventing the Z-180 and the 6200 electronics
from executing incorrectly due to low +5V line voltage.
Z-180 IC100 pins 55, 56, and 57 comprise the host serial data communication
Summary of Contents for OPTIMOD 6200
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Page 170: ...6 28 TECHNICAL DATA Orban Model 6200...
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Page 175: ...OPTIMOD TECHNICAL DATA 6 33 PCB ASSEMBLY MAIN 1 98 1 98 1 98 32020 000 03 1 of 1 6200 FC CB CB...
Page 181: ...OPTIMOD TECHNICAL DATA 6 39 SCHEMATIC DSP 2 1 98 1 98 1 98 62020 000 04 6 of 7 6200 FC CB CB...
Page 183: ...OPTIMOD TECHNICAL DATA 6 41 PCA DISPLAY 6200 1 98 1 98 1 98 32016 000 01 1 of 1 6200 FC CB CB...
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