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80

Instruction

Treatment

OUT and OUT NOT

Designated bit turned OFF.

TIM, TIMM(20), TIMH(21), ATIM(22),
ATM1(25), and ATM2(26)

Reset.

CNT, RDM(23), and CNTH(24)

Frozen and PV maintained.

KEEP(12)

Bit status maintained.

DIFU(10) and DIFD(11)

Not executed (see below).

All others

Not executed.

IL(02) and ILC(03) do not necessarily have to be used in pairs. IL(02) can be
used several times in a row, with each IL(02) creating an interlocked section
through the next ILC(03). ILC(03) cannot be used unless there is at least one
IL(02) between it and any previous ILC(03).

Changes in the execution condition for a DIFU(10) or DIFD(11) are not re-
corded if the DIFU(10) or DIFD(11) is in an interlocked section and the ex-
ecution condition for the IL(02) is OFF. When DIFU(10) or DIFD(11) is execu-
tion in an interlocked section immediately after the execution condition for the
IL(02) has gone ON, the execution condition for the DIFU(10) or DIFD(11)
will be compared to the execution condition that existed before the interlock
became effective (i.e., before the interlock condition for IL(02) went OFF).
The ladder diagram and bit status changes for this are shown below. The
interlock is in effect while bit 0000 is OFF. Notice that bit 0215 is not turned
ON at the point labeled A even though 0001 has turned OFF and then back
ON.

0000

IL(02)

DIFU(10) 0215

ILC(03)

0001

0000

0001

ON

OFF

ON

OFF

0215

ON

OFF

A

Address

Instruction

Operands

000

LD

0000

001

IL(02)

002

LD

0001

003

DIFU(10)

0215

004

ILC(03)

There must be an ILC(03) following any one or more IL(02).

Although as many IL(02) instructions as necessary can be used with one
ILC(03), ILC(03) instructions cannot be used consecutively without at least
one IL(02) in between. Whenever a ILC(03) is executed, all interlocks be-
tween the active ILC(03) and the preceding ILC(03) are cleared.

STEP(04) and SNXT(05) cannot be used between the INTERLOCK and IN-
TERLOCK CLEAR instructions.

There are no flags affected by these instructions.

DIFU(10) and DIFD(11) in
Interlocks

Precautions

Flags

Instruction Set

Section 3-7

Summary of Contents for SYSMAC mini SP10

Page 1: ...Cat No W197 E1 2B SP10 SP16 SP20 SYSMAC mini Programmable Controllers OPERATION MANUAL...

Page 2: ...SYSMAC mini Programmable Controllers SP10 SP16 SP20 Operation Manual Revised September 1997...

Page 3: ...s word and is abbreviated Wd in documentation in this sense The abbreviation PC means Programmable Controller and is not used as an abbreviation for any thing else Visual Aids The following headings a...

Page 4: ...2 4 Programming Console 20 SECTION 3 Programming 25 3 1 Introduction 27 3 2 Memory Areas 27 3 3 The Programming Console 37 3 4 Basic Programming 39 3 5 Inputting the Program 51 3 6 Advanced Programmin...

Page 5: ...1 B Specifications 133 C Programming Instructions and Execution Times 135 D Programming Console Operations 143 E Error and Arithmetic Flag Operation 147 F I O Assignment Sheets 149 G Program Coding Sh...

Page 6: ...on to enable you to write input and execute a basic ladder diagram program The remainder of this section provides more advanced programming information with 3 7 describing individually each instructio...

Page 7: ...in this section is important for the safe and reliable application of the PC You must read this section and understand the information contained before attempting to set up or operate a PC system 1 I...

Page 8: ...used for the specified purpose and under the specified conditions especially in applications that can directly or indirectly affect human life You must consult with your OMRON representative before ap...

Page 9: ...t apply voltages exceeding the rated input voltage to the input section The input section may be destroyed Do not apply voltages exceeding the maximum switching capacity to the out put section The out...

Page 10: ...le with the SP series PCs and how to connect these configurations Detailed wiring and installation procedures are provided in Section 2 Installation 1 1 Features 2 1 2 PC Basics 2 1 2 1 PC Terminology...

Page 11: ...e SP10 and two analog timers are pro vided with the SP16 and SP20 The set time of these analog timers can be changed even while the PC is operating with adjustment screws located in side the front cov...

Page 12: ...r also provides computer capabilities and accuracy to achieve a great deal more flexibility and reliability than is possible with relays The symbols and other control concepts used to describe PC oper...

Page 13: ...SP series PCs Assuming you have already purchased one or more of these PCs you must have a reasonable idea of the required information for steps one and two which are discussed briefly below The rest...

Page 14: ...within the PC When the PC receives an input from a start switch it could start the motor The PC could then stop the motor when the counter has received a specified number of input signals from the pho...

Page 15: ...the RE VERSIBLE DRUM COUNTER RDM 23 When RDM 23 isn t being used these terminals can be used as normal input points but the input signal must be below 1 kHz Indicators The PC has four indicators on t...

Page 16: ...ms to be transferred directly to and from the Programming Console Each Card has a built in battery to preserve data Only one model of Memory Card HMC ES141 may be used Each Memory Card has 16 Kbytes o...

Page 17: ...10 16 with the SP16 or 20 with the SP20 Here the Program ming Console is connected directly to the CPU for programming and opera tion Connecting Cable SP10 CN__1 PC SP10 PRO01 V1 1 4 2 Expanded System...

Page 18: ...o not change the point of connection of any CPU after a unit number has been assigned to it If CPUs are connected to a connecter for a different unit number unpredictable errors will occur during oper...

Page 19: ...ion Detailed specifications are provided in Appendix B Specifications 2 1 Dimensions 12 2 2 Installation 13 2 2 1 Installation Environment 13 2 2 2 Cooling 14 2 2 3 Preventing Noise 14 2 2 4 Mounting...

Page 20: ...sions are in millimeters SP10 D_ _ SP16 D_ _ SP20 D_ _ A B 68 53 81 PC model Dimension A Dimension B SP10 D_ _ 92 81 SP16 D_ _ 135 124 SP20 D_ _ 160 149 SP10 AL001 92 81 68 53 81 SP10 PRO01 V1 91 155...

Page 21: ...1000 500 1 PFP 50N PFP 100N 7 3 0 15 35 0 3 27 0 5 25 25 4 5 15 10 1000 27 24 29 2 16 PFP 100N2 35 0 3 10 50 11 5 M4x8 35 3 35 5 1 8 1 8 1 6 2 10 4 8 1 3 End Plate PFP M 2 2 Installation 2 2 1 Install...

Page 22: ...so that the length of the Connecting Cable between any CPU and the Link Adapter does not exceed 4 meters Cooling Fan Ensure adequate ventilation is provided for the PCs A cooling fan is not al ways ne...

Page 23: ...esired Use DIN Track 35 mm wide There is a groove on the back of the Unit that is used to attach it to the DIN Track When mounting to DIN Track be sure to remove the mounting screws Removal Mounting S...

Page 24: ...wisted pair cables Noise can also be significantly reduced by connecting a 1 to 1 isolation transformer Note Do not short the positive and negative lines DC Connections Supply 24 VDC and keep voltage...

Page 25: ...guration Internal circuit Insulating Photocoupler 250 VAC 24 VDC max Use seperate power supplies for load power sources Relay s power 24 V is internally supplied Internal circuit The following example...

Page 26: ...IN Input devices The power source of the SP10 for external supply is rated at 0 1 A 24 VDC max and the power source of the SP16 and SP20 is rated at 0 2 A 24 VDC max The input circuit consumes about...

Page 27: ...mmon is used Use the CPU s 24 VDC power supply output to supply power to inputs If the maximum output current of 0 3 A is not sufficient use a separate DC power supply DC Input Devices Power source fo...

Page 28: ...ay be adversely affected if the relay is located near contac tors valves motors or other devices that produce vibration Protective Circuits We recommend the use of arc suppressors to increase contact...

Page 29: ...apter and be tween the Link Adapter and the Programming Console must be 4 2 m maxi mum 2 4 1 Designating the PC Any of the PCs connected in a PC Link may be accessed through the Link Adapter using the...

Page 30: ...of the input device signals or induced noise the input signals are received via a filter The filter may be adjusted so that input pulses of a duration less than a minimum specified duration of the fil...

Page 31: ...e connected to the PC If the filter value is set to 0 or 1 ms be sure that the input wiring is carefully installed to prevent interference Input 0 to specify 0 ms 1 for 1 ms 2 for 5 ms and 3 for 10 ms...

Page 32: ...Console settings Group 1 0 ms group 2 5 ms The display will show the settings for groups 1 2 and 3 when the Program ming Console is connected to an SP16 or SP20 0 PC 0 1 2 ProCo 0 2 2 PC settings Gro...

Page 33: ...ogy 39 3 4 2 Mnemonic Code 41 3 4 3 Ladder Instructions 42 3 4 4 OUTPUT and OUTPUT NOT 44 3 4 5 The END Instruction 44 3 4 6 Logic Block Instructions 45 3 4 7 Coding Multiple Right hand Instructions 5...

Page 34: ...16 HIGH SPEED TIMER TIMH 21 87 3 7 17 ANALOG TIMER ATIM 22 87 3 7 18 ANALOG TIMER 1 and 2 ATM1 25 and ATM2 26 88 3 7 19 COUNTER CNT 89 3 7 20 REVERSIBLE DRUM COUNTER RDM 23 92 3 7 21 HIGH SPEED COUNT...

Page 35: ...CPU and execute the program to check for execution errors and correct these 8 After the entire Control System has been installed and is ready for use execute the program and fine tune it if required 3...

Page 36: ...used by the HIGH SPEED TIMER instruction TIMH and TC 15 is used by the ANALOG TIMER instruction 3 2 1 Data Area Structure When designating a data area the acronym for the area is always required for...

Page 37: ...numbers for one word are shown below Bit number Contents 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Digit number 3 2 1 0 When referring to the entire word the dig...

Page 38: ...instruction is ex ecuted the content of word 05 is compared with that of DR 10 It is also possible however to use indirect DR addresses as operands for instructions If DR 01 is specified as the data...

Page 39: ...work bits or for any other purpose SP10 SP16 SP20 Word Bits Word Bits Word Bits 00 0008 to 0015 00 0010 to 0015 00 0012 to 0015 01 0104 to 0115 01 0106 to 0115 01 0108 to 0115 02 0200 to 0215 02 0200...

Page 40: ...applies to the SP16 and SP20 only Word Bit Function 05 0500 to 0514 Cannot be used 0515 DR Data Transfer Enable Bit 06 0600 to 0615 Cannot be used 07 0700 to 0707 Maximum Scan Time Area 0708 to 0715 C...

Page 41: ...power is applied to the PC This bit will be ON after the DR Area Transfer operation has been performed The status of bit 0515 is retained in a power interrup tion i e DR data will be transferred from...

Page 42: ...R 11 LR 00 to LR 03 LR 00 to LR 07 DR 00 DR 07 No LR Area 64 bit LR Area 128 bit LR Area Allocating 0 64 or 126 bits for the LR area corresponds to the following num ber of words for the transfer of d...

Page 43: ...tes the LR area is currently set to 64 bits in the Programming Console When the LR area is 64 bits each PC is allocated one word 16 bits of write area for its own use Data transfer is illustrated in t...

Page 44: ...C 0 is turned ON LR 0000 of PC 1 2 and 3 are also turned ON OFF LR 00 is the write area of PC 0 i e LR 00 of PC 1 2 and 3 are used to read data written by PC 0 3 2 6 DR Area The DR area is used for da...

Page 45: ...s also used regardless of the counter instruction that was used to define the counter TC numbers can be designated for operands that require bit data or for oper ands that require word data When desig...

Page 46: ...Key Indicates an LR link bit DR Data Bit Key Indicates a DR data bit CH Word Indirect Address Key Indicates an indirect DR address when pressed without the Shift Key and designates a word address whe...

Page 47: ...the CPU Power Supply Unit is ON and there is no device connected to the CPU ensure that commencing operation is safe and appropriate before turning on the PC WARNING Do not leave the Programming Conso...

Page 48: ...way the operation of each of the in structions corresponds to a condition is described below Before we consider these however there are some basic terms that must be explained Each condition in a lad...

Page 49: ...in other memory areas because each address does not necessarily hold the same amount of data Rather each address holds one instruction and all of the definers and operands de scribed in more detail l...

Page 50: ...ion A LOAD NOT instruction Address Instruction Operands 000 LD 0000 001 Instruction 002 LD NOT 0000 003 Instruction When this is the only condition on the instruction line the execution condition for...

Page 51: ...hen AND and OR instructions are combined in more complicated dia grams they can sometimes be considered individually with each instruction performing a logic operation on the execution condition and t...

Page 52: ...up to the first END instruction before returning to the beginning of the program and beginning execution again Although an END instruction can be placed at any point in a program which is sometimes d...

Page 53: ...ers to loading the last unused ex ecution condition An unused execution condition is produced by using the LOAD or LOAD NOT instruction for any but the first condition on an instruc tion line Analyzin...

Page 54: ...3 0005 0100 Address Instruction Operands 000 LD 0000 001 OR NOT 0001 002 LD NOT 0002 003 OR 0003 004 AND LD 005 LD 0004 006 OR 0005 007 AND LD 008 OUT 0100 The following diagram requires OR LOAD instr...

Page 55: ...LD 0002 003 AND NOT 0003 004 LD NOT 0004 005 AND 0104 006 OR LD 007 AND LD 008 OUT 0102 When determining what logic block instructions will be required to code a dia gram it is sometimes necessary to...

Page 56: ...combined it with the execution condition from the first AND LOAD Then block d would be coded a third AND LOAD would be used to combine the execution condition from block d with the execution conditio...

Page 57: ...at of block c etc LR 0000 0000 0003 0004 0106 0107 0001 0002 0005 Block e Block d Block c Block b Block a Address Instruction Operands Blocks d and e Block c with result of above Block b with result o...

Page 58: ...iagram can be coded with OR AND and AND NOT instructions The logical flow for this and the resulting code are shown below 0000 0001 0100 0002 0003 0010 0011 0004 0005 0100 0106 Block c Block b Block a...

Page 59: ...d clear it first using the program memory clear key sequence then input the new program If you need the previous program be sure to check it with the program check key sequence and correct it as requi...

Page 60: ...d off the buzzer that sounds when Programming Console keys are pressed If BZ is displayed in the upper right corner the buzzer is operative If BZ is not displayed the buzzer is not operative This buzz...

Page 61: ...or when installing a new pro gram clear all memory areas Before clearing memory check to see if a pro gram is already loaded that you need If you need the program clear only the memory areas that you...

Page 62: ...ve already been taken care of If the buzzer sounds when an attempt is made to clear an error message eliminate the cause of the error and then clear the error message refer to Section 5 Trou bleshooti...

Page 63: ...input into Program Memory the key inputs below would produce the displays shown 0 000 0 050 0 050READ LD 0000 0 051READ AND NOT 0200 0 052READ OR 0201 0 053READ OR 0100 0 054READ AND 0001 0 055READ OU...

Page 64: ...erands i e com pletion flags are designated by pressing either TIM or CNT before the ad dress depending on whether the TC number has been used to define a timer or a counter To designate an indirect D...

Page 65: ...fter the END instruction or shorten the program ADR OVER Address too large Program exceeds program memory s last address Set the address again I O No ERR Operand error An illegal value has been entere...

Page 66: ...ng has been changed will be displayed Change the LR area setting ensuring the region is identical to that specified when the program was created NO END INST No END instruction An END instruction canno...

Page 67: ...3 If the size of the LR area is changed after programming operations have been started or the program code accesses illegal addresses program transfer cannot be performed and the message will be displ...

Page 68: ...is selected as the response to this prompt the display will indicate the selection by plac ing a flashing cursor over the corresponding number The display will indicate the direction of the transfer b...

Page 69: ...rting and Deleting Instructions In PROGRAM mode any instruction that is currently displayed can be de leted or another instruction can be inserted before it These operations are not possible in RUN mo...

Page 70: ...achieved in a pro gram through the key sequences and displays shown below Original Program Address Instruction Operands 000 LD 0000 001 AND 0001 002 LD 0201 003 AND NOT 0002 004 OR LD 005 AND 0003 006...

Page 71: ...003 AND NOT 0002 004 OR LD 005 AND 0003 006 AND 0005 007 AND NOT 0004 008 OUT 0101 009 END 01 000 LD 0000 001 AND NOT 0001 002 LD 0001 003 AND NOT 0002 004 OR LD 005 AND 0003 006 AND 0005 007 OUT 0101...

Page 72: ...nt and the last instruction on the top instruction line the execution condition at the branching point and the execution condition after completing the top in struction line will sometimes be differen...

Page 73: ...ction 2 0001 ILC 03 IL 02 0004 Instruction 3 Instruction 4 0008 0005 0003 0002 IL 02 Address Instruction Operands 000 LD 0000 001 IL 02 002 LD 0001 003 Instruction 1 004 LD 0002 005 IL 02 006 LD 0003...

Page 74: ...l be turned ON for one scan after bit 0000 goes ON The next time DIFU 10 0200 is executed bit 0200 will be turned OFF regardless of the status of bit 0000 With the DIFFERENTIATE DOWN instruction bit 0...

Page 75: ...e just as in the same diagram using the KEEP in struction two reset bits are used i e DR 0000 can be turned OFF by turning ON either bit 0004 or bit 0005 0002 0003 DR 0000 DR 0000 0004 0005 Address In...

Page 76: ...ock that stores the resulting execution condition as the status of bit 0103 Bit 0103 is then combined with various other conditions to determine output conditions for bit 0000 bit 0001 and bit 0002 i...

Page 77: ...ed for diagram B only coding diagram A would be impossible Instruction 2 Instruction 1 0002 0003 0000 0001 0004 Diagram A Instruction 1 0004 0003 0000 0001 Diagram B 0002 Instruction 2 0004 0000 0001...

Page 78: ...g ladder diagrams it is important to keep in mind the number of instructions that will be required to input it In diagram A below an OR LOAD instruction will be required to combine the top and bottom...

Page 79: ...ion word which specifies the instruction and contains any definers described below or operand bits required by the instruction Other operands required by the instruction are contained in following wor...

Page 80: ...R 06 contained 5555 the value 5555 would be moved to LR 00 MOV 30 DR 01 LR 00 Word Content DR 00 4C23 DR 01 0006 DR 02 F3A3 DR 06 5555 DR 07 2255 DR 08 D1C5 5555 moved to LR 00 Indicates DR 06 Indirec...

Page 81: ...the left side of the data column and the number to be input is placed on the right side Any numbers input as definers in the instruction word do not require the number symbol on the right side TC bits...

Page 82: ...program will not be executed even if you switch to RUN mode 3 7 5 LOAD LOAD NOT AND AND NOT OR and OR NOT B Bit I O work dedicated DR LR TC Ladder Symbols Operand Data Areas LOAD LD B B Bit I O work d...

Page 83: ...er to 3 4 3 Ladder Instructions for details There are no flags affected by these instructions 3 7 6 AND LOAD and OR LOAD Ladder Symbol AND LOAD AND LD 0002 0003 0000 0001 Ladder Symbol OR LOAD OR LD 0...

Page 84: ...ing the OUT or OUT NOT with TIM Refer to Examples under 3 7 14 TIMER TIM for details There are no flags affected by these instructions 3 7 8 DIFFERENTIATE UP and DIFFERENTIATE DOWN DIFU 10 and DIFD 11...

Page 85: ...ccordingly If the ex ecution condition remains ON flag status may be changed each scan if the content of one or both operands change Diagram B however is an example of how DIFU 10 can be used to ensur...

Page 86: ...shown below S execution condition R execution condition Status of B KEEP 12 operates like the self maintaining bit described in 3 6 5 Self main taining Bits Seal The following two diagrams would funct...

Page 87: ...0000 0100 0002 0003 0004 0001 Reset input Indicates emergency situation Activates warning display Address Instruction Operands 000 LD 0002 001 OR 0003 002 OR 0004 003 LD 0001 004 KEEP 12 DR 0000 005...

Page 88: ...11 will be compared to the execution condition that existed before the interlock became effective i e before the interlock condition for IL 02 went OFF The ladder diagram and bit status changes for t...

Page 89: ...structions written after END 01 will be executed END 01 can be placed anywhere in the program to execute all instructions up to that point as is sometimes done to debug a program but it must be remove...

Page 90: ...perand in certain instructions The TIM prefix is used regardless of the timer instruction that was used to define the timer Once defined as a counter a TC number can be prefixed with CNT for use as an...

Page 91: ...re illustrates the relationship between the execution condi tion for TIM and the Completion Flag assigned to it Execution condition Completion Flag ON OFF ON OFF SV SV Timers in interlocked program se...

Page 92: ...xample bit 0100 will be turned ON 30 minutes after bit 0000 goes ON TIM can also be combined with CNT or CNT can be used to count dedicated clock pulse bits to produce longer timers An example is prov...

Page 93: ...01 i e TIM 01 will turn ON and because it is programmed as a normally closed condition an OFF ex ecution condition will be created for OUT 0103 0000 TIM 01 0215 0215 0215 TIM 01 0215 0103 0000 0103 1...

Page 94: ...the 1 second clock pulse is used 0308 so that 0101 would be turned ON and OFF every second i e it would be ON for 0 5 seconds and OFF for 0 5 seconds Precise timing and the initial status of 0101 woul...

Page 95: ...n time i e because outputs are refreshed only once each scan the accuracy of TIMH 21 is lim ited to the order of magnitude of the scan time Refer to 3 9 Program Execu tion for details on the scan time...

Page 96: ...of operation are the same Timers in interlocked program sections are reset when the execution condi tion for IL 02 is OFF Power interruptions also reset timers If a timer that is not reset under thes...

Page 97: ...be set independently from other timers Refer to 3 7 14 TIMER TIM for other operational details and examples Ex cept for the above and all aspects of operation are the same Timers in interlocked progra...

Page 98: ...unt pulse CP Execution condition on reset R ON OFF ON OFF Completion Flag ON OFF PV SV SV 1 SV 2 0002 0001 0000 SV Flags ER The Error Flag 0311 will be turned ON when the SV is contained in a word SP1...

Page 99: ...r CNT 01 is 100 and the SV for CNT 02 is 200 the Completion Flag for CNT 02 turns ON when 100 x 200 or 20 000 OFF to ON changes have been counted in 0001 This would result in 0103 being turned ON 0103...

Page 100: ...NT 02 008 OUT 0100 TIM 01 0050 In the following example CNT 01 counts the number of times the 1 second clock pulse bit 0308 goes from OFF to ON Here again 0000 is used to control the times when CNT is...

Page 101: ...rd will remain ON until the current value is no longer within the specified range If the lower limit is greater than the upper limit the corresponding bit of the result word R will be turned ON whenev...

Page 102: ...start input and reset input conditions are entered with LD before CNTH 24 is entered The Completion Flag CNT 13 is turned ON when the PV reaches the SV and will remain ON for one scan only When the S...

Page 103: ...1 0004 0002 SI R CNTH 24 CNT13 0150 0003 0004 Flags ER The Error Flag 0311 will be turned ON when the SV is not BCD The instruction will be executed but operation will not be reliable In the following...

Page 104: ...shifted in When I is shifted into the register all bits previously in the register are shifted to the left and the leftmost bit of the reg ister is lost Execution condition I Lost data Wd The executio...

Page 105: ...i e when DR 0003 turns ON 0100 is turned ON to activate the pusher The program is set up so that a rotary encoder 0000 controls execution of SFT 33 through a DIFU 10 the rotary encoder is set up to tu...

Page 106: ...MOVE NOT MVN 31 S Source word I O work dedicated 03 only DR LR TC D Destination word Output bits work bits DR LR Ladder Symbol Operand Data Areas MVN 31 S D When the execution condition is OFF MVN 31...

Page 107: ...ge the status of these flags Be sure to access them before the desired status is changed ER Indirectly addressed DR word is non existent Content of DR word is not BCD or the DR area boundary has been...

Page 108: ...P 32 and the LE flag 0313 to pro duce outputs at particular times in the timer s countdown The timer is started by turning ON 0000 When 0000 is OFF TIM 10 is reset and the second two CMP 32 s are not...

Page 109: ...block there will be N 1 comparison ranges BCMP 34 compares CD to the ranges defined by a block consisting of CB 1 CB 2 CB 2N 2 Each range is defined by two words the first one providing the lower lim...

Page 110: ...0104 0 02 0210 DR 11 1501 DR 12 1600 0105 0 BCMP 34 02 DR 00 01 00000 Comparison block CB 1 to CB 2N 2 or DR 01 to DR12 Address Instruction Operands 000 LD 0000 001 BCMP 34 02 DR 00 01 Compare data in...

Page 111: ...000 DR 01 ADD 40 0000 0000 DR 01 0312 CY 3 7 29 BCD SUBTRACT SUB 41 Mi Minuend word BCD I O work dedicated 03 only DR LR TC Su Subtrahend word BCD I O work dedicated 03 only DR LR TC Ladder Symbol Ope...

Page 112: ...maintaining bit so that a change in the status of CY will not turn it OFF when the program is cycled again In this example differentiated forms of SUB 41 are used so that the subtrac tion operation is...

Page 113: ...is OFF ANDW 42 is not executed When the execution condition is ON ANDW 42 logically AND s the contents of I1 and I2 bit by bit and places the result in R 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 15 00 0 1 0 1...

Page 114: ...p STEP 04 does not require an execution condition i e its execution is controlled through the control bit To start execution of the step SNXT 05 is used with the same control bit as used for STEP 04 I...

Page 115: ...Each step must start with STEP 04 and generally ends with SNXT 05 When steps are programmed in series three types of execution are possible sequential branching or par allel The execution conditions...

Page 116: ...0003 0000 0210 0411 STEP 04 0200 1 Scan 0411 0200 Start Address Instruction Operands Address Instruction Operands 000 LD 0000 001 SNXT 05 0200 002 STEP 04 0200 003 LD 0210 004 LD 0411 005 CNT 1 0003...

Page 117: ...be sure to write down the error mes sage when required before pressing MON CHECK OK will be displayed when the last message has been cleared In RUN mode errors cannot be cleared by pressing MON Also...

Page 118: ...I O response times 3 9 1 Scan The major factors in determining program timing are the scan time and the I O response time When program execution is started the CPU scans the program from top to bottom...

Page 119: ...shion with each cycle forming one scan The scan time is the time that is required for the CPU to complete one of these cycles This cycle includes basically five types of operation Overseeing Program e...

Page 120: ...B C D E B D E C Tmin Minimum I O response time input delay filter time scan time output delay C B 300 s program execution time A where A Output delay see table below B Filter value refer to Section 2...

Page 121: ...ed control sys tem the I O response time is increased with every PC having their own re sponse time The average I O response time given as a function of the num ber of linked PCs is shown in the follo...

Page 122: ...ds Refer to 3 5 8 Program Transfer for the procedures for transferring programs and data between the Programming Console and the PC or Memory Cards 4 1 Monitoring Operation and Modifying Data 116 4 1...

Page 123: ...gram by displaying the bit or word address whose status is to be monitored and pressing MON When a bit is monitored it s ON OFF status will be displayed in RUN mode when a word address is designated o...

Page 124: ...Cancels monitor operation Clears leftmost address Shifts to word monitor Program Read Multibit Word Monitor Key Sequence Bit Address Cancels one bit Scrolls the dis play Cancels all monitoring Monito...

Page 125: ...Completion flag is ON Monitor operation is cancelled 0 001 0 001READ TIM 00 0 T 00 1234 0 T 01 0000 0 001 TIM 01 Bit Monitor 0 000 0 000READ ON LD 0000 0 001READ OFF AND 0001 Word Monitor 0 000 0 000...

Page 126: ...and ENT can be pressed to turn ON OFF the bit start reset the timer or increment reset the counter Timers will not operate in PROGRAM mode Dedicated flags and bits cannot be turned ON and OFF with thi...

Page 127: ...0000 C 05 0100 0 0000 C 05 OFF 0100 0 0000 C 05 OFF 0100 0 0000 C 05 ON 0099 0 0000 C 05 OFF 0099 After one scan the value of 0000 is reset to 0 4 1 3 Hexadecimal BCD Data Modification When the Bit M...

Page 128: ...PRES VAL T 00 0119 0 PRES VAL T 00 0100 0200 0 T 00 0199 4 1 4 Binary Monitor You can specify that the contents of a monitored word be displayed in binary by pressing SHIFT and MON after the word addr...

Page 129: ...inary bit status The cursor which can be shifted to the left with the up key and to the right with the down key indicates the position of the bit that can be changed After positioning at the desired b...

Page 130: ...Memory Card HMC ES141 may be used Each Memory Card has 16 Kbytes of S RAM A battery is built in to the Memory Card to allow the data to be retained One Memory Card can hold up to 27 SP10 programs or...

Page 131: ...AT END Note 1 The battery of the memory card model HMC BAT01 lithium battery CR2325 3 V has to be replaced within the time period indicated on the back of the memory card If the battery is not replace...

Page 132: ...s errors The memory card data is transferred to the Programming Console s RAM to allow it to be checked Perform a program check to confirm the program NO SUPPORT CARD The Memory Card is not initialize...

Page 133: ...127 SECTION 5 Troubleshooting 5 1 Alarm Indicators 128 5 2 Reading and Clearing Errors and Messages 128 5 3 Error Messages 128 5 4 Error Flags 129...

Page 134: ...all message errors as you read them It is not possible to clear an error or a message while in RUN mode the PC must be in PROGRAM mode When all messages have been cleared CHECK OK will be displayed an...

Page 135: ...k the power supply voltage and wiring CPU error The watchdog timer 100 ms has timed out Turn power OFF change to PROGRAM mode and turn power ON again Memory error MEMORY ERR The program may contain an...

Page 136: ...al hand held with backlit LCD display Compatible with Memory Cards Memory Card and Connecting Cable sold separately see below Usable only with SP series PCs SP10 PRO01 V1 Programming Console Connectin...

Page 137: ...hes and AC power cord power switch also included SP10 ETL01 SP16 ETL01 SP20 ETL01 Note The cables between CPUs and the Link Adapter must be 4 m or less The sum of the distance be tween CPU 0 and the L...

Page 138: ...5 C Programming Console 0 to 45 C Ambient operating humidity 10 to 90 with no condensation Ambient atmosphere No corrosive gases Ambient storage temperature 20 to 75 C Programming Console 20 to 65 C S...

Page 139: ...o bit 0105 SP20 20 bit 0000 to bit 0011 and bit 0100 to bit 0107 Work bits SP10 36 bit 0008 to bit 0015 and bit 0104 to bit 0215 SP16 208 bit 0010 to bit 0015 bit 0106 to bit 0215 and bit 1000 to bit...

Page 140: ...either LOAD or LOAD NOT B I O W D 03 and 04 LR DR TC AND AND ENT AND Bit address Combines a normally open condition in series with a previous condition B I O W D 03 and 04 LR DR TC AND NOT AND NOT AN...

Page 141: ...DR N TC SP16 SP20 NO OPERATION NOP 00 None FUN 0 0 ENT Does nothing Can be inserted into a program before or after modifications are made to prevent program addresses from changing Special Instructio...

Page 142: ...es a counter that indicates when the present value is within specified ranges by turning ON specific bits in R Used to turn operations ON and OFF for specific count ranges St defines the size of the t...

Page 143: ...ined by a block consisting of CB 1 CB 2 CB 2N 2 Each range is defined by two words the first one providing the lower limit and the second word providing the upper limit The corresponding bit of the re...

Page 144: ...I2 R FUN 4 3 ENT ENT ENT ENT I1 I2 R Performs an OR between two words one bit at a time and places the result in the result word R I1 R I2 OR R O W LR DR DR I1 I2 I O W D LR TC DR DR CLEAR CARRY CLC...

Page 145: ...N time OUT NOT 2 3 2 4 7 0 Always Same as ON time TIM 4 24 4 Constant for SV R 23 0 IL 24 8 38 5 Word for SV SP16 SP20 only R 28 6 63 0 DR for SV SP16 SP20 only IL 27 1 CNT 4 24 4 Constant for SV R 22...

Page 146: ...2 Comparing DR content SFT 33 3 3 35 2 to 41 8 Always R 32 2 IL 19 6 BCMP 34 SP16 SP20 5 5 41 5 to 134 4 0 to 5 comparison ranges with a constant for compare data R 13 1 IL 4 9 43 0 to 136 0 0 to 5 co...

Page 147: ...d in RUN mode I O bit status will be displayed Moves to next address Moves to preceding address Address Designation Program Read 54 Binary Monitor RUN or PRGM Used to monitor up to 4 memory words in b...

Page 148: ...and memory cards and to delete program files UM includes the filter values File deleted File name Program transferred CLR FUN 2 6 1 ENT 2 1 ENT 2 ENT 2 1 ENT ENT DEL ENT ENT To from PC To from Memory...

Page 149: ...Factory set to 0 PC no 0 to 3 MON CLR FUN 6 7 1 2 3 0 52 Instruction Insert PRGM only Used to insert an instruction at the address currently being displayed Address Designation Program Read Instructio...

Page 150: ...0315 GT TIM Unaffected Unaffected Unaffected Unaffected Unaffected CNT Unaffected Unaffected Unaffected Unaffected Unaffected END 01 OFF OFF OFF OFF OFF STEP 04 Unaffected Unaffected Unaffected Unaffe...

Page 151: ...well as details of work bits data storage areas timers and counters Some bits appear as both I O bits and work bits so that the I O assignment sheets can be used for any of the SP series PCs Be sure...

Page 152: ...0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 0010 0011 Outputs Bit Field device Notes 0100 0101 0102 0103 0104 0105 0106 0107 Unit 1 Inputs Bit Field device Notes 0000 0001 0002 0003 0004 0005 00...

Page 153: ...tes 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 0010 0011 Outputs Bit Field device Notes 0100 0101 0102 0103 0104 0105 0106 0107 Unit 3 Inputs Bit Field device Notes 0000 0001 0002 0003 0004 000...

Page 154: ...es 00 01 01 03 04 05 06 07 08 09 10 11 12 13 14 15 Word 00 Bit Usage Notes 0008 0009 0010 0011 0012 0013 0014 0015 Word 01 Bit Usage Notes 0104 0105 0106 0107 0108 0109 0110 0111 0112 0113 0114 0115 W...

Page 155: ...02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Bit Usage Note...

Page 156: ...I O Assignment Sheets Appendix F 154 No System Programmer Program Date Unit Word Contents Notes Word Contents Notes Data Storage...

Page 157: ...d for use in coding ladder diagram programs When coding programs be sure to specify all function codes for instructions and data areas or for constant for operands These will be necessary when inputti...

Page 158: ...03 004 005 006 007 008 009 010 011 012 013 014 015 016 017 018 019 020 021 022 023 024 025 026 027 028 029 030 031 032 033 034 035 036 037 Address Instruction Operand s 038 039 040 041 042 043 044 045...

Page 159: ...79 080 081 082 083 084 085 086 087 088 089 090 091 092 093 094 095 096 097 098 099 100 101 102 103 104 105 106 107 108 109 110 111 112 113 Address Instruction Operand s 114 115 116 117 118 119 120 121...

Page 160: ...55 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 Address Instruction Operand s 190 191 192 193 194 195 196 197...

Page 161: ...31 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 Address Instruction Operand s 266 267 268 269 270 271 272 273...

Page 162: ...am Programmer Date Address Instruction Operand s 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 Address Instruction Operand s 327 328 329 330 331 332 333 3...

Page 163: ...rically equivalent to one decimal digit bit A binary digit hence a unit of data in binary notation The smallest unit of information that can be electronically stored in a PC The status of a bit is eit...

Page 164: ...em controlled system The devices that are being controlled by a PC System control signal A signal sent from the PC to effect the operation of the controlled system counter A dedicated group of digits...

Page 165: ...the fundamental concepts of PC Systems download The process of transferring a program or data from a higher level computer to a lower level computer or PC or between peripheral devices and the PC elec...

Page 166: ...al coming from an external device into the PC The term input is often used abstractly or collectively to refer to incoming signals input bit A bit that is allocated to hold the status of an input inpu...

Page 167: ...Acronym for Japanese Industrial Standards ladder diagram program A form of program arising out of relay based control systems that uses cir cuit type diagrams to represent the logic flow of programmin...

Page 168: ...condition when the bit assigned to it is ON and an OFF execution condition when the bit assigned to it is OFF NOT A logic operation which inverts the status of the operand For example AND NOT indicat...

Page 169: ...spond physically to terminals or connector pins output signal A signal being sent to an external device Generally an output signal is said to exist when for example a connection point goes from low to...

Page 170: ...operation that allows inputting and debugging of programs to be carried out but that does not permit normal execution of the program PV Acronym for present value refresh The process of updating output...

Page 171: ...location to which the result of an instruction is to be written The latter is called the destination SV Abbreviation for set value switching capacity The maximum voltage current that a relay can safel...

Page 172: ...ing currently executed watchdog timer A timer within the system that ensures that the scan time stays within speci fied limits When limits are reached either warnings are given or PC opera tion is sto...

Page 173: ...structure 28 data retention in DR area 36 in TC area 36 debugging 109 110 decimal point 30 dedicated bit definition 31 definers definition 71 digit numbers 29 dimensions DIN Track 13 for mounting 13 L...

Page 174: ...106 TIM 83 TIMH 21 87 TIMM 20 86 instructions designation function codes 56 table 135 terminology 39 interlocks 79 108 converting to mnemonic code 80 using self maintaining bits 67 L ladder diagram br...

Page 175: ...8 displaying and clearing error messages 109 entering and editing 55 example using shift register 97 inserting and deleting instructions 61 64 precautions 69 program transfer to PC 58 reading scan tim...

Page 176: ...OMPARE BCMP 34 Other instruc tions and operations have also been updated for the new PCs These new fea tures are not supported by the SP10 The following mistake was also corrected Page 89 Operation wh...

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