Instruction Set and Execution Times
Appendix C
136
Name/
mnemonic
Operands
*
Description
Key inputs
Symbol
OUTPUT
NOT
OUT NOT
ENT
NOT
Bit address
OUT
Specifies an output bit that is to be turned OFF for an
ON execution condition and ON for an OFF condition.
B:
O
W
LR
DR
TIMER
TIM
TIM
ENT
TIM
ENT
TC number
SV
Creates a 0.1-s decrementing timer that starts from the
set value (SV) when the execution condition turns ON.
SV can be between 0.0 and 999.9 s. When the SV has
been timed out, the Completion Flag is turned ON.
SV:
#
N:
TC
SP10
SV:
I/O
W
LR
DR
#
N:
TC
SP16, SP20
COUNTER
CNT
CP
R
CNT
ENT
CNT
ENT
TC number
SV
Counts down the number of times the input condition
turns ON. Each time the input condition turns ON, the
present value (PV) is reduced by 1 and when the count
reaches 0, the Completion Flag (accessed through the
counter number) turns ON. The SV can be between 0
and 9999.
SV:
#
N:
TC
SP10
SV:
I/O
W
LR
DR
#
N:
TC
SP16, SP20
NO
OPERATION
NOP(00)
None
FUN
0
0
ENT
Does nothing. Can be inserted into a program before
or after modifications are made to prevent program
addresses from changing.
---
Special Instructions
Name/
mnemonic
Symbol
Key inputs
Description
Operands
*
END
END(01)
END(01)
FUN
0
ENT
1
Indicates the end of the program. A program will not be
executed unless the END instruction is used.
---
INTERLOCK
IL(02)
INTERLOCK
CLEAR
ILC(03)
IL(02)
ILC(03)
FUN
0
ENT
2
FUN
0
ENT
3
INTERLOCK and INTERLOCK CLEAR are combined
to control the status of multiple outputs based on the
execution condition of INTERLOCK, and are generally
used to prevent specific bits from being ON
simultaneously.
---
STEP
DEFINE
STEP(04)
STEP(04)
STEP(04)B
Bit address
FUN
0
4
ENT
Divides a program into sections called steps that can
be executed as separate processes. Up to five steps
can be created.
Defining the Beginning of a Step (Operand Required)
Ending Step Execution (No Operand)
STEP(04) B
STEP(04)
B:
O
W
LR
DR
STEP START
SNXT(05)
SNXT(05)
FUN
0
ENT
5
Bit address
Turns OFF any previous steps and starts the designated
step.
B:
O
W
LR
DR