94
DR 0000
Limits: 0001 to 0002
Count input (II)
0000
0001 0002 0003 0004 0005 0004 0003 0002 0001 0000 9999 9998 9997 0000
0000
0000
DR 0001
Limits: 0004 to 0002
Present value
Reset input (RI)
Decrement/increment
input (DI))
3-7-21
HIGH-SPEED COUNTER - CNTH(24)
SP16 and SP20 Only
SV: Set value (BCD)
I/O, work, DR, LR, #
Operand Data Areas
Ladder Symbol
SI
R
CNTH(24) N
SV
The TC number is automatically set to CNT 13, the count pulse (CP) to input
bit 0000, and the hard reset input (R) to input bit 0001 when CNTH(24) is
designated. Inputs 0000 and 0001 cannot be used as normal input terminals
when CNTH(24) is being used.
CNTH(24) is a high-speed incrementing counter. The present value (PV) be-
gins at 0000 and will be incremented by one whenever CP (input bit 0000)
goes from OFF to ON as long as the start input condition (SI) is ON and the
reset input (R) is OFF. The start input and reset input conditions are entered
with LD before CNTH(24) is entered. The Completion Flag, CNT 13, is turned
ON when the PV reaches the SV and will remain ON for one scan only.
When the SV is reached, the PC will be automatically reset to zero.
The maximum counter value can be set by setting the SV to 0000 rather than
to 9999, i.e., the counter will count to 10,000 when the SV is set to 0000.
CNTH(24) is reset with R. When R goes from OFF to ON, the PV is reset to
zero. The PV will not be incremented while R is ON. Counting from zero will
begin again when R goes OFF. The PV for CNT 13 will not be reset in inter-
locked program sections or by power interruptions.
CNTH(24) counting is enabled with SI. When SI is OFF, the PV is not
changed even if R is OFF and CP goes from OFF to ON. Counting will re-
sume when SI is turned ON again.
The count pulse for CNTH(24) is input bit 0000 and the hard reset input is
input bit 0001. The count signal must be at least 150
µ
s (3.3 kHz) wide and
Limitations
Description
Instruction Set
Section 3-7