Q-Code User Manual
Ver. 7.0 2021/11/30
183
1. NY4 / NY5 / NY5+ / NY6A / NY9T / NX1 do not support this command.
2. This command is applicable to the SPI Flash of N25Q series; the instruction is 0x05.
Ex.
SPI_RDSR(R1:R0)
; Read Status Register data through SPI1 and save into [R1:R0].
SPI_RDSR(X0, SPI1)
; Read Status Register data through SPI1 and save into X0.
SPI_RDSR(X0, SPI2)
; Read Status Register data through SPI2 and save into X0.
4.9.15 SPI_WRD(Addr, Data, SPIGroup)
Transmit Page Program command to the SPI Flash to write data into specified address. User can write
many bytes of data at one time with SPI_TX command. After the data sent, it needs to issue
SPI_CS_Off command to write in. User needs to use SPI_RDSR command to read WIP bit (bit0)
register status. When writing, this bit is 1. After writing finished, this bit is 0.
Addr:
Specify 24-bit address of reading data which can be immediate value or variable specified.
When specified by a variable, high bit variable can be omitted, the omitted bit is defaulted as 0.
。
Data
:
The writing data can be immediate value or variable specified.
SPIGroup:
Select the corresponding SPI channel.
NY6 does not support SPIGroup parameter.
NY7 supports SPI1 or SPI2; default is SPI1 if omitted.
Note:
1. NY4 / NY5 / NY5+ / NY6A / NY9T / NX1 do not support this command.
2. This command is applicable to the SPI Flash of N25Q series; the instruction is 0x02.
3. This command will automatically set WEL bit to 1, users do not need to execute SPI_WREN
command additionally.
4. While the command executes, it is automatically set CS pin as low level. After the writing
data are sent, issue SPI_CS_Off command to write in.
5. When writing to SPI Flash, WIP bit (bit0) of status register is set as 1, users can read bit
status through SPI_RDSR command. When it is 0, it means finished writing.
6. Page Program command can write 256 bytes at most. The address is added by 1
automatically every time a byte is sent, but only for low 8 bit. If current writing address is
0x1FF, it will be 0x100 after adding 1.
7. According to amount of writing data, it may take hundred ms. All commands are invalid in
this period except SPI_RDSR command.
Ex.
SPI_WRD(0x4321, 0x32), SPI_CS_Off
; Write 0x32 into address 0x4321 through SPI1.
X0=0xFF, R2=0x2, R3=0x1, X2=0x34, SPI_WRD(R3:R2:X0, X2, SPI2),
SPI_TX(0x56, SPI2), SPI_TX(0x78, SPI2), SPI_CS_Off(SPI2)
; Through SPI2, write 0x34 into address 0x12FF, 0x56 into address 0x1200 and 0x78 into
