2.6 Reference tables (pll0_phi, pll0_phi1, and pll1_phi)
The three tabs
pll0_phi
,
pll0_phi1
, and
pll1_phi
are reference tables for the user to find the appropriate PLL dividers and multipliers
to achieve the desired PLL frequency. There is a tab for each PLL output because input frequencies and the range of acceptable
divider/multiplier values differ between each other. However, they all follow the same setup. Note that Columns A, B, and C of
these tabs are frozen so if the table looks cut off, just scroll left or right.
PLL frequencies are calculated from a reference frequency, a reference divider (RFD), a multiplier (MFD), and in PLL0, a prescaler
(PREDIV). The PLL reference is not manually configurable because there is a finite number of input values the PLL can take. For
example, PLL0 can only reference either the 16 MHz IRCOSC or the 8-40 MHz XOSC. PLL reference therefore comes from the
Tree
tab. Configure
AUX Clock Selector 3
and
AUX Clock Selector 4
in
Tree
for PLL0 and PLL1, respectively. Once the PLL
reference frequency is configured, enter the desired PLL output frequency. Also, enter the PREDIV value when using
PLL0_PHI
or
PLL0_PHI1
. The reference table will then calculate the output frequency for each MFD and RFD setting. Like in the other
sections, frequencies are color-coded to define which values are valid and which are not. Shading will change automatically once
the output PLL frequencies are calculated. MFD and RFD settings that achieve the exact desired frequency will be shaded in
green; values that exceed the desired frequency, but are within MPC5746R hardware specifications are marked in yellow; and
frequencies that exceed the MPC5746R hardware specification are colored red. Below is a screenshot of the reference table for
PLL0_PHI
.
Figure 14. PLL0_PHI reference table
2.7 Summary
Almost all blocks populating this clock calculator represent real register fields in silicon. The
Summary
tab collates all the
information from the rest of the clock calculator into a list of register values, a screenshot of which is shown in
. The values in the register summary are interactive, updating automatically when the associated block is changed. Registers
listed within
Summary
are only the ones whose values are affected by clock configuration, not every single register available in
the SoC.
NXP Semiconductors
Clock calculator design
MPC574xR Clock Calculator Guide, Rev. 5, October 2018
Application Note
10 / 28
