APPENDIX D REVISION HISTORY
User’s Manual U14826EJ5V0UD
209
(2/3)
Edition Description
Applied
to
CHAPTER 1 GENERAL
(
µ
PD789860 SUBSERIES)
•
Update of
1.5 78K/0S Series Lineup
and
2.5 78K/0S Series Lineup
to
latest version
CHAPTER 2 GENERAL
(
µ
PD789861 SUBSERIES)
•
Modification of description of
3.2.9 V
PP
(
µ
PD78E9860A, 78E9861A only)
CHAPTER 3 PIN
FUNCTIONS
•
Addition of description of timer input of P21 to
9.3 (4) Port mode register
2 (PM2)
CHAPTER 9 8-BIT TIMERS
30 AND 40
•
Modification of
Figure 11-1 Block Diagram of Power-on-Clear Circuit
and
Figure 11-2 Block Diagram of Low-Voltage Detection Circuit
•
Addition of
Caution
to
11.4.2 Operation of low-voltage detection (LVI)
circuit
•
Modification of
Figure 11-9 LVI Circuit Operation Timing
CHAPTER 11 POWER-ON-
CLEAR CIRCUITS
•
Addition of
12.3 (2) Port mode register 2 (PM2)
CHAPTER 12 BIT
SEQUENTIAL BUFFER
•
Addition of description of power supply voltage and OSTS oscillation
stabilization time to
Table 17-1 Differences Between
µ
PD78E9860A,
78E9861A and Mask ROM Versions
CHAPTER 17
µ
PD78E9860A, 78E9861A
CHAPTER 20 ELECTRICAL
SPECIFICATIONS
CHAPTER 21 EXAMPLE OF
RC OSCILLATION
FREQUENCY
CHARACTERISTICS
(REFERENCE VALUES)
CHAPTER 22 PACKAGE
DRAWING
CHAPTER 23
RECOMMENDED
SOLDERING CONDITIONS
4th
Addition of chapter
APPENDIX B NOTES ON
TARGET SYSTEM DESIGN
•
Addition of
µ
PD789860(A) as a product name
Throughout
•
Addition of
1.4 Quality Grade
•
Update of
1.6 78K/0S Series Lineup
to latest version
•
Addition of
1.9 Differences Between Standard Quality Grade Products
and (A) Products
CHAPTER 1 GENERAL
(
µ
PD789860 SUBSERIES)
•
Update of
2.5 78K/0S Series Lineup
to latest version
CHAPTER 2 GENERAL
(
µ
PD789861 SUBSERIES)
•
Deletion of non-selectable clock settings
•
Addition of
Notes
to
Figure 5-2 Format of EEPROM Write Control
Register 10
•
Modification of description of (8) in
5.4 Notes for EEPROM Writing
CHAPTER 5 EEPROM
(DATA MEMORY)
5 th
•
Addition of description “output to EEPROM” to
Figure 9-2 Block Diagram
of Timer 40
CHAPTER 9 8-BIT TIMERS
30 AND 40
