NEC DLP CINEMA NC1600C, Service Manual

Page: 221 / 382

“Confidential, Do Not Duplicate without written authorization from NEC.”
8-16
CIRCUIT DESCRIPTION
Description of Operation of PJDIV PWB Circuit
1
Power distribution
The power output fed from the power unit is distributed to the respective boards of the set.
CPU PWB : 5V (Standby), 5V (Main)
MOTHER PWB : 3.3 V (Main), 5V (Main), 12V (Main)
ETHER PWB
: 24V (Standby)
DVI-OUT PWB : 3.3V (Main), 5V (Main)
SENSOR PWB : 5V (Main)
PEDE-A PWB
: 5V (Main)
FAN : 24V (Main) (w/o AC-FAN)
Teach panel : V (Standby) (Optional)
MM2000B : 5V (Main) (Optional)
2
FAN circuit
The power output of 24V (Main) is fed to the fans in the set, except for the lamp cooling fan.
here is a provision of a hardware protective circuit (a protective circuit that works even in the case of CPU
runaway) intended to unlight the lamp at the time of fan stoppage, including the lamp cooling fan.
In this case, the CPU PWB identifies the fan that has stopped and indicates the information about this fan at
the LCD.
3
A/D conversion of L-SENS PWB output
The L-SENS PWB generates the voltage output that is proportionate to the brightness of the lamp.
The output voltage is A/D-converted and then identified at the CPU PWB.
According to the recognized information, the CPU PWB utilizes this information for automatic compensation
of lamp output or other adequate functions.
4
Generation of Power good signal
The Power good signals are generated based on the supervisory signals of power voltages and the control
signals fed from the CPU PWB.