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Then COMP will clamp to SS, forcing COMP to rise (the last
200 mV before switching begins) according to the C
SS
charg-
ing time (t
SS
) which can be estimated as:
The system start-up time (t
SU
or t
SU-SS
) is defined as:
C
SS
< 0.4 x C
CMP
C
SS
> 0.4 x C
CMP
As a general rule of thumb, standard smooth startup operation
can be achieved with C
SS
= C
CMP
.
OVER-VOLTAGE LOCKOUT (OVLO)
30085758
FIGURE 13. Over-Voltage Protection Circuitry
The LM3424 can be configured to detect an output (or input)
over-voltage condition via the OVP pin. The pin features a
precision 1.24V threshold with 20 µA (typical) of hysteresis
current as shown in
. When the OVLO threshold is
exceeded, the GATE pin is immediately pulled low and a 20
µA current source provides hysteresis to the lower threshold
of the OVLO hysteretic band.
If the LEDs are referenced to a potential other than ground
(floating), as in the buck-boost and buck configuration, the
output voltage (V
O
) should be sensed and translated to
ground by using a single PNP as shown in
The over-voltage turn-off threshold (V
TURN-OFF
) is defined:
Ground Referenced
Floating
In the ground referenced configuration, the voltage across
R
OV2
is V
O
- 1.24V whereas in the floating configuration it is
V
O
- 620 mV where 620 mV approximates V
BE
of the PNP.
The over-voltage hysteresis (V
HYSO
) is defined:
30085759
FIGURE 14. Floating Output OVP Circuitry
INPUT UNDER-VOLTAGE LOCKOUT (UVLO)
The nDIM pin is a dual-function input that features an accurate
1.24V threshold with programmable hysteresis as shown in
. This pin functions as both the PWM dimming input
for the LEDs and as a V
IN
UVLO. When the pin voltage rises
and exceeds the 1.24V threshold, 20 µA (typical) of current is
driven out of the nDIM pin into the resistor divider providing
programmable hysteresis.
300857a5
FIGURE 15. UVLO Circuit
When using the nDIM pin for UVLO and PWM dimming con-
currently, the UVLO circuit can have an extra series resistor
to set the hysteresis. This allows the standard resistor divider
to have smaller resistor values minimizing PWM delays due
to a pull-down MosFET at the nDIM pin (see PWM Dimming
section). In general, at least 3V of hysteresis is preferable
when PWM dimming, if operating near the UVLO threshold.
The turn-on threshold (V
TURN-ON
) is defined as follows:
The hysteresis (V
HYS
) is defined as follows:
UVLO only
PWM dimming and UVLO
17
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LM3424