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NI 9144 User Guide and Specifications
NI 9242/9244 Example Data Rates
The example data rates use a 12.8 MHz clock source.
NI 9242/9244 Calibration Data
The NI 9242/9244 has four channels (Ch 0, Ch 1, Ch 2 and Ch N) with a nominal range of ±500
V and ±997.5V respectively. Calibration data is set up by the driver during initialization. The
third-party user does not need to check the index 0x2100 to calibrate the data manually. The
Table 90.
NI 9242/9244Scan List Format
Bits
Field
Description
7
Reserved
—
6..2
Clock Divisor
The NI 9242/9244 divides the clock source by this value and
uses it as the converters' oversample clock. The data rate is
equal to 1/256 times this oversample clock frequency. Valid
values for Clock Divisor are from 1 to 31.
1..0
Clock Source = 2
0b00 = 0: The OCLK pin is used as the oversample clock
source.
0b01 = 1: The 12.8 MHz internal clock is used as the clock
source and this 12.8 MHz is driven onto the OCLK pin.
0b10 = 2: The internal clock is used but not driven onto
OCLK pin. Currently, this is the required clock setting.
0b11 = 3: Reserved.
Table 91.
NI 9242/9244 Example Data Rates
Data Rate
Clock Divisor
Clock Source
Rate Byte
Oversample
Clock Rate
50.000 kS/s
00001
10
0x06
12.80 MHz
25.000 kS/s
00010
10
0x0A
6.40 MHz
12.500 kS/s
00100
10
0x12
3.20 MHz
10.000 kS/s
00101
10
0x16
2.56 MHz
6.250 kS/s
01000
10
0x22
1.60 MHz
5.000 kS/s
01010
10
0x2A
1.28 MHz
3.333 kS/s
01111
10
0x3E
853 kHz
3.125 kS/s
10000
10
0x42
800 kHz
2.500 kS/s
10100
10
0x52
640 kHz
2.000 kS/s
11001
10
0x66
512 kHz
