Motorola MVME2603-1121A, Installation And Use Manual

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Glossary
GL-9
G
L
O
S
S
A
R
Y
PIB
P CI-to- I SA B ridge
pixel
An acronym for picture element, also called a pel. A pixel is
the smallest addressable graphic on a display screen. In
RGB systems, the color of a pixel is defined by some Red
intensity, some Green intensity, and some Blue intensity.
PLL
P hase- L ocked L oop
PMC
P CI M ezzanine C ard
POWER
P erformance O ptimized W ith E nhanced R ISC architecture
(IBM)
PowerPC™
The trademark used to describe the P erformance O ptimized
W
ith
E
nhanced
R
ISC microprocessor architecture for
P ersonal C omputers developed by the IBM Corporation.
PowerPC is superscalar, which means it can handle more
than one instruction per clock cycle. Instructions can be sent
simultaneously to three types of independent execution
units (branch units, fixed-point units, and floating-point
units), where they can execute concurrently, but finish out
of order. PowerPC is used by Motorola, Inc. under license
from IBM.
PowerPC 601™
The first implementation of the PowerPC family of
microprocessors. This CPU incorporates a memory
management unit with a 256-entry buffer and a 32KB
unified (instruction and data) cache. It provides a 64-bit
data bus and a separate 32-bit address bus. PowerPC 601 is
used by Motorola, Inc. under license from IBM.
PowerPC 603™
The second implementation of the PowerPC family of
microprocessors. This CPU incorporates a memory
management unit with a 64-entry buffer and an 8KB
(instruction and data) cache. It provides a selectable 32-bit
or 64-bit data bus and a separate 32-bit address bus.
PowerPC 603 is used by Motorola, Inc. under license from
IBM.
PowerPC 604™
The third implementation of the PowerPC family of
microprocessors currently under development. PowerPC
604 is used by Motorola, Inc. under license from IBM.