Motorola MVME2603-1121A Installation And Use Manual Download Page 16

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Table 5-2. Diagnostic Test Groups

...................................................................... 5-8

Table A-1. Motorola Computer Group Documents

....................................... A-1

Table A-2. ManufacturersÕ Documents

............................................................ A-2

Table A-3. Related SpeciÞcations

...................................................................... A-6

Table B-1. MVME2603/2604 SpeciÞcations

......................................................B-1

Table C-1. EIA-232-D Interconnect Signals

...................................................... C-3

Table C-2. EIA-232-D Interface Transmitter Characteristics

......................... C-4

Table C-3. EIA-232-D Interface Receiver Characteristics

.............................. C-5

Table C-4. MVME761 EIA-530 Interconnect Signals

...................................... C-6

Table C-5. EIA-530 Interface Transmitter Characteristics

.............................. C-8

Table C-6. EIA-530 Interface Receiver Characteristics

................................... C-9

Table D-1. Troubleshooting MVME2603/2604 Boards

.................................. D-1

Summary of Contents for MVME2603-1121A

Page 1: ...MVME2600 Series Single Board Computer Installation and Use V2600A IH2 ...

Page 2: ...rior written permission of Motorola Inc It is possible that this publication may contain reference to or information about Motorola products machines and programs programming or services that are not announced in your country Such references or information must not be construed to mean that Motorola intends to announce such Motorola products programming or services in your country Restricted Right...

Page 3: ... MVME2604 2041A MVME2604 2091A MVME2604 2121A MVME2604 2131A MVME2604 2141A MVME2604 2191A This manual is intended for anyone who wants to supply OEM systems add capability to an existing compatible system or work in a lab environment for experimental purposes A basic knowledge of computers and digital logic is assumed After using this manual you may wish to become familiar with the publications l...

Page 4: ...nel or other qualiÞed maintenance personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Do not replace components with power cable connected Under certain conditions dangerous voltages may exist even with the power cable removed To avoid injuries always disconnect power and discharge circuits before touching them Do Not Service or Adjust...

Page 5: ...e equipment European Notice Board products with the CE marking comply with the EMC Directive 89 336 EEC Compliance with this directive implies conformity to the following European Norms EN55022 CISPR 22 Radio Frequency Interference EN50082 1 IEC801 2 IEC801 3 IEEC801 4 Electromagnetic Immunity This board product was tested in a representative system to show compliance with the above mentioned requ...

Page 6: ......

Page 7: ...on J22 1 14 Remote Status and Control 1 14 MVME712M Transition Module Preparation 1 15 Serial Ports 1 4 DCE DTE ConÞguration 1 17 Serial Port 4 Clock ConÞguration 1 17 P2 Adapter Preparation 1 24 MVME761 Transition Module Preparation 1 25 Serial Ports 1 and 2 1 27 ConÞguration of Serial Ports 3 and 4 1 27 P2 Adapter Preparation Three Row 1 32 P2 Adapter Preparation Five Row 1 34 Hardware Installat...

Page 8: ...pt Handling 2 10 DMA Channels 2 12 Sources of Reset 2 12 Endian Issues 2 13 Processor Memory Domain 2 14 PCI Domain 2 14 VMEbus Domain 2 15 Chapter 3 Functional Description Introduction 3 1 Features 3 1 General Description 3 3 Block Diagram 3 5 SCSI Interface 3 6 SCSI Termination 3 6 Ethernet Interface 3 7 PCI Mezzanine Interface 3 8 VMEbus Interface 3 9 ISA Super I O Device ISASIO 3 9 Asynchronou...

Page 9: ...MVME712M Transition Module 3 23 MVME761 Transition Module 3 24 Serial Interface Modules 3 25 Chapter 4 Connector Pin Assignments MVME2603 2604 Connectors 4 1 Common Connectors 4 3 LED Mezzanine Connector J1 4 3 Debug Connector J2 4 3 Floppy LED Connector J4 4 7 PCI Expansion Connector J5 4 8 Keyboard and Mouse Connectors J6 J8 4 10 DRAM Mezzanine Connector J7 4 10 PCI Mezzanine Card Connectors 4 1...

Page 10: ...r 5 3 Debugger Commands 5 4 Diagnostic Tests 5 8 Chapter 6 CNFG and ENV Commands Overview 6 1 CNFG ConÞgure Board Information Block 6 2 ENV Set Environment 6 3 ConÞguring the PPCBug Parameters 6 3 ConÞguring the VMEbus Interface 6 12 Motorola Computer Group Documents A 1 ManufacturersÕ Documents A 2 Related SpeciÞcations A 6 Appendix B Specifications SpeciÞcations B 1 Cooling Requirements B 2 FCC ...

Page 11: ...xi Interface Characteristics C 8 Proper Grounding C 9 Appendix D Troubleshooting CPU Boards Solving Startup Problems Introduction D 1 Glossary Abbreviations Acronyms and Terms to Know GL 1 ...

Page 12: ...xii ...

Page 13: ...nt 1 24 Figure 1 12 MVME761 Connector and Header Locations 1 26 Figure 1 13 MVME761 Serial Ports 1 and 2 DCE Only 1 29 Figure 1 14 MVME761 Serial Ports 3 and 4 DCE ConÞguration 1 30 Figure 1 15 MVME761 Serial Ports 3 and 4 DTE ConÞguration 1 31 Figure 1 16 MVME761 P2 Adapter Three Row Component Placement 1 33 Figure 1 17 MVME761 P2 Adapter Five Row Component Placement 1 34 Figure 1 18 RAM200 Place...

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Page 15: ...sion Connector 4 8 Table 4 5 Keyboard Connector 4 10 Table 4 6 Mouse Connector 4 10 Table 4 7 DRAM Mezzanine Connector 4 11 Table 4 8 PCI Mezzanine Card Connector 4 14 Table 4 8 PCI Mezzanine Card Connector Continued 4 15 Table 4 9 VMEbus Connector P1 4 16 Table 4 10 VMEbus Connector P2 MVME712M I O Mode 4 18 Table 4 11 SCSI Connector MVME712M 4 19 Table 4 12 Serial ConnectionsÑMVME712M Ports 1 4 ...

Page 16: ...cations B 1 Table C 1 EIA 232 D Interconnect Signals C 3 Table C 2 EIA 232 D Interface Transmitter Characteristics C 4 Table C 3 EIA 232 D Interface Receiver Characteristics C 5 Table C 4 MVME761 EIA 530 Interconnect Signals C 6 Table C 5 EIA 530 Interface Transmitter Characteristics C 8 Table C 6 EIA 530 Interface Receiver Characteristics C 9 Table D 1 Troubleshooting MVME2603 2604 Boards D 1 ...

Page 17: ...PCª Series microprocessor The MVME2603 is equipped with a PowerPC 603 microprocessor the MVME2604 has a PowerPC 604 microprocessor 256KB L2 cache level 2 secondary cache memory is available as an option on all versions The complete MVME2603 2604 consists of the base board plus An ECC DRAM module RAM200 for memory An optional PCI mezzanine card PMC for additional versatility An optional carrier boa...

Page 18: ...PHB MPIC RAVEN ASIC MEMORY CONTROLLER FALCON CHIPSET 64 BIT PMC SLOT PCI EXPANSION 33MHz 32 64 BIT PCI LOCAL BUS PIB W83C553 ETHERNET DEC21140 SCSI 53C825A VME BRIDGE UNIVERSE BUFFERS AUI 10BT 100BTX VME P2 VME P1 RTC NVRAM WD MK48T59 ISA REGISTERS SUPER I O PC87308 ESCC 85230 CIO Z8536 712 761 P2 I O OPTIONS MOUSE KBD FLOPPY LED PARALLEL SERIAL FRONT PANEL ISA BUS 66MHz MPC604 PROCESSOR BUS FLASH...

Page 19: ...Caution MVME2600 1XXX MVME761 compatible models will be damaged if they are mistakenly connected to the MVME712 family of boards instead of the correct MVME761 transition modules Caution MVME2600 2XXX MVME712 compatible models will be damaged if they are mistakenly connected to the MVME761 transition modules instead of the correct MVME712 family of boards Table 1 1 VMEmodule Transition Module Corr...

Page 20: ...Unpacking Instructions 1 5 ConÞgure the hardware by setting jumpers on the boards and transition modules MVME2603 2604 Base Board Preparation and MVME712M Transition Module Preparation or MVME761 Transition Module Preparation 1 6 and 1 15 or 1 25 Ensure memory mezzanines are properly installed on the base board RAM200 Memory Mezzanine Installation 1 33 Install the MVME2603 2604 VMEmodule in the ch...

Page 21: ...tion and ensure proper operation of the MVME2603 2604 you may need to carry out certain hardware modifications before installing the module Note that the debugger initializes the MVME2603 2604 Using the Debugger 5 3 You may also wish to obtain the PPCBug Firmware Package UserÕs Manual listed in Appendix A Related Documentation A 1 Initialize the system clock Using the Debugger Debugger Commands th...

Page 22: ...ment of the switches jumper headers connectors and LED indicators on the MVME2603 2604 Manually configurable items on the base board include Cache mode control J3 Flash bank selection J10 Serial Port 4 receive clock configuration J16 Serial Port 4 transmit clock configuration J17 Serial Port 4 transmit clock receiver buffer control J20 Serial Port 3 transmit clock configuration J18 System controll...

Page 23: ...er J3 on older boards On newer MVME2603 2604 boards header J3 is not provided With a jumper installed on J3 cache write through is under CPU control With the jumper removed cache write through occurs in all cases Flash Bank Selection J10 The MVME2603 2604 base board has provision for 1MB of 16 bit Flash memory The RAM200 memory mezzanine accommodates 4MB or 8MB of additional 64 bit Flash memory Th...

Page 24: ... devices on the RAM200 mezzanine place a jumper across header J10 pins 1 and 2 To enable Flash bank B 1MB of firmware located in sockets on the base board place a jumper across header J10 pins 2 and 3 3 2 1 3 2 1 Flash Bank A Enabled 4MB 8MB Soldered Flash Bank B Enabled 1MB Sockets J10 J10 factory configuration ...

Page 25: ...ation headers as well J17 Serial Port 4 transmit clock configuration J20 Serial Port 4 transmit clock receiver buffer control J15 on the MVME712M transition module or J3 on the MVME761 transition module Serial Port 4 clock configuration Figures 1 8 1 9 for the MVME712M and Figures 1 14 1 15 for the MVME761 diagram the overall jumper settings required on the MVME2603 2604 and transition module for ...

Page 26: ...7 00 9608 J4 2 1 25 24 49 50 1 2 26 27 J7 2 1 J12 J2 J1 XU1 XU2 J5 2 1 J14 64 2 1 J11 2 1 J13 64 2 1 J9 16 15 J18 J17 J16 J15 J10 J20 J22 J6 6 5 4 2 1 3 J8 6 5 4 2 1 3 J3 ABT PCI MEZZANINE CARD RST KEYBOARD MOUSE FLOPPY LED CHS BFL CPU PCI FUS SYS P1 A1 B1 C1 A32 B32 C32 P2 D1 D32 A1 B1 C1 A32 B32 C32 D1 D32 J23 ...

Page 27: ... clock configuration J20 Serial Port 4 transmit clock receiver buffer control J15 on the MVME712M transition module or J3 on the MVME761 transition module Serial Port 4 clock configuration Figures 1 8 1 9 for the MVME712M and Figures 1 14 1 15 for the MVME761 diagram the overall jumper settings required on the MVME2603 2604 and transition module for a Serial Port 4 DCE or DTE configuration For add...

Page 28: ...th Serial Port 4 Installing a jumper on J20 enables the buffer Removing the jumper disables the buffer The factory configuration has the Serial Port 4 buffer enabled J20 remains open on MVME761 compatible versions On MVME712M compatible versions J20 is set in tandem with J17 to configure the Serial Port 4 transmit clock If one deviates from the factory configuration so must the other Figures 1 8 1...

Page 29: ...emains open on MVME712M compatible versions To complete the configuration of Serial Port 3 you must set J2 on the MVME761 transition module Serial Port 3 clock configuration as well Figures 1 6 1 7 for the MVME712M and Figures 1 14 1 15 for the MVME761 diagram the overall jumper settings required on the MVME2603 2604 and transition module for a Serial Port 3 DCE or DTE configuration For additional...

Page 30: ...ns 1 and 2 When the board is functioning as system controller the SCON LED is turned on Remote Status and Control The MVME2603 2604 front panel LEDs and switches are mounted on a removable mezzanine board Removing the LED mezzanine makes the mezzanine connector J1 a keyed double row 14 pin connector available for service as a remote status and control connector In this application J1 can be connec...

Page 31: ...chronous only EIA 232 D multiprotocol serial ports An SCSI interface via P2 adapter for connection to both internal and external devices Socket mounted SCSI terminating resistors for end of cable or middle of cable configurations Provision for modem connection Green LED for SCSI terminator power yellow LED for Ethernet transceiver power The features of the P2 adapter board include A 50 pin connect...

Page 32: ... 1 19 8 1 R51 C1 C2 C3 J2 J3 1 50 49 A1 C1 C32 A32 2 1 14 13 J1 2 1 14 13 J13 2 1 14 13 J16 2 1 14 13 J18 8 1 R50 8 1 R49 2 1 14 13 J11 2 1 14 13 J14 2 1 14 13 J17 2 1 14 13 J19 2 1 20 19 1 6 J21 J20 2 12 J15 11 1 2 49 50 DS2 DS1 J5 J4 cb228 9212 ETHERNET PRINTER MVME712M SERIAL PORT 1 CONSOLE SERIAL PORT 3 SERIAL PORT 2 TTY01 SERIAL PORT 4 SCSI INTERFACE PRIMARY SIDE 36 ...

Page 33: ... module with the interconnections and jumper settings for DCE DTE configuration on each serial port Serial Port 4 Clock Configuration Port 4 can be configured via J15 Figure 1 4 to use the TrxC4 and RtxC4 signal lines Part of the configuration is done with headers J16 J17 and J20 on the MVME2603 2604 Figures 1 9 and 1 10 Figure 1 4 J15 Clock Line Configuration Table 1 3 MVME712M Port Jumper Corres...

Page 34: ... SOUT1 RTS1 DTR1 SIN1 R11 CTS1 PC87308 DCD1 DSR1 3 5 8 6 7 TXD RTS GND NC 5V 2 4 12V 12V MVME2603 2604 P2 ADAPTER BOARD 64 PIN CABLE MVME712M MODULE TXD RTS DTR SOUT1 RTS1 DTR1 SIN1 R11 CTS1 PC87308 DCD1 DSR1 2 4 20 7 RXD CTS GND NC 5V 3 5 12V 11551 00 9609 2 8 MVME2603 2604 P2 ADAPTER BOARD 64 PIN CABLE MVME712M MODULE DCE DTE DB9 DB9 ...

Page 35: ... DTR DCD 11551 00 9609 4 8 SOUT2 RTS2 DTR2 SIN2 R12 CTS2 PC87308 DCD2 DSR2 2 4 20 7 RXD CTS GND 5V 3 5 MVME2603 2604 P2 ADAPTER BOARD 64 PIN CABLE MVME712M MODULE 8 RXD CTS DCD DTR SOUT2 RTS2 DTR2 SIN2 R12 CTS2 PC87308 DCD2 DSR2 3 5 8 6 7 TXD RTS GND 5V 2 4 MVME2603 2604 P2 ADAPTER BOARD 64 PIN CABLE MVME712M MODULE DSR 20 12V DB9 DB9 ...

Page 36: ...ial Port 3 DCE Configuration RXD CTS DTR TXDA RTSA DCDA RXDA RTXCA TRXCA 3 5 6 7 TXD RTS GND 5V 2 4 MVME2603 2604 64 PIN CABLE MVME712M MODULE DSR 11551 00 9609 5 8 Z85230 CTSA DTR3 LLB3 RLB3 DSR3 5V R13 Z8536 5V 5V 5V TM3 8 DCD NOTE J18 OPEN P2 ADAPTER 5V 12V 20 DCE DB9 ...

Page 37: ... Serial Port 3 DTE Configuration TXD RTS DCD TXDA RTSA DCDA RXDA RTXCA TRXCA 2 4 7 RXD CTS GND 5V 3 5 MVME2603 2604 64 PIN CABLE MVME712M MODULE 11551 00 9609 6 8 Z85230 CTSA DTR3 LLB3 RLB3 DSR3 5V R13 Z8536 5V 5V 5V TM3 DTR NOTE J18 OPEN P2 ADAPTER 5V 20 8 DTE DB25 ...

Page 38: ...tion RXD CTS DTR TXDB RTSB DCDB RXDB RTXCB TRXCB TXD RTS GND MVME2603 2604 64 PIN CABLE MVME712M MODULE DSR 11551 00 9609 7 8 Z85230 CTSB DTR4 LLB4 RLB4 DSR4 5V R14 Z8536 5V 5V 5V TM4 DCD NOTE J20 OPEN P2 ADAPTER 12V J17 3 5 6 7 2 4 8 20 TXCI RXCI TXCO J16 J20 15 17 24 J16 1 2 J17 1 2 DCE DB25 ...

Page 39: ...figuration TXD RTS DCD TXDB RTSB DCDB RXDB RTXCB TRXCB RXD CTS GND MVME2603 2604 64 PIN CABLE MVME712M MODULE 11551 00 9609 8 8 Z85230 CTSB DTR4 LLB4 RLB4 DSR4 5V R14 Z8536 5V 5V 5V TM4 DCD NOTE J20 1 2 P2 ADAPTER J17 2 4 7 3 5 TXCI RXCI TXCO J16 J20 15 17 24 J16 2 3 J17 2 3 20 8 DTE DB25 ...

Page 40: ...strates the location of the resistors fuse and connectors For further information on the preparation of the transition module and the P2 adapter refer to the userÕs manual for the MVME712M listed in the Related Documentation appendix as necessary Figure 1 11 MVME712M P2 Adapter Component Placement C1 B1 A1 C32 B32 A32 2 1 50 49 R2 R3 R1 C1 C2 C3 F1 P2 CR1 1 1 2 A1 B1 C1 A32 B32 C32 J2 J3 cb211 921...

Page 41: ... compliant An Ethernet interface supporting 10Base T 100Base TX connections Two EIA 232 D asynchronous serial ports identified as COM1 and COM2 on the front panel Two synchronous serial ports SERIAL 3 and SERIAL 4 on the front panel configurable for EIA 232 D EIA 530 V 35 or X 21 protocols Two 60 pin Serial Interface Module SIM connectors used on configuring serial ports 3 and 4 The features of th...

Page 42: ...dule Preparation 1 26 1 Figure 1 12 MVME761 Connector and Header Locations P2 MVME 761 001 SERIAL 3 COM1 COM2 PARALLEL DTE 1 J5 J6 J7 J8 J4 J9 1910 9609 3 DCE J2 J1 60 59 2 1 10 100 BASET SERIAL J12 60 59 2 1 DTE 1 3 DCE J3 ...

Page 43: ...ule SIM selection and jumper settings The following table lists the SIM connectors and jumper headers corresponding to each of the synchronous serial ports Port 3 is routed to board connector J7 Port 4 is available at board connector J8 Eight serial interface modules are available EIA 232 D DCE and DTE EIA 530 DCE and DTE V 35 DCE and DTE X 21 DCE and DTE You can configure Serial Ports 3 and 4 for...

Page 44: ...ing SIM module When installing the SIM modules note that the headers are keyed for proper orientation For further information on the preparation of the transition module refer to the userÕs manual for the MVME761 listed in the Related Documentation appendix as necessary The next three figures illustrate the MVME2603 2604 base board and MVME761 transition module with the interconnections and jumper...

Page 45: ...1 Figure 1 13 MVME761 Serial Ports 1 and 2 DCE Only MVME2603 2604 11552 00 9609 1 3 3 7 2 8 4 MVME761 6 1 9 5 3 7 2 8 4 6 1 9 5 COM1 COM2 SOUT1 RTS1 DTR1 SIN1 RI1 CTS1 DSR1 DCD1 PC87308 P2 P2MX SOUT2 RTS2 DTR2 SIN2 RI2 CTS2 DSR2 DCD2 DCE DB9 DB9 ...

Page 46: ...14 MVME761 Serial Ports 3 and 4 DCE Configuration 11552 00 9802 2 5 MVME761 TXD RTS RXD CTS DCD TRXC RTXC DTR LLB RLB DSR RI TM Z85230 SCC Z8536 CIO EIA232 DCE SIM J2 J3 1 2 3 J15 1 2 3 DCE MVME3600 SERIES 3 5 4 20 2 15 17 24 8 25 22 21 18 6 7 HD26 P2 P2MX ...

Page 47: ...MVME761 Serial Ports 3 and 4 DTE Configuration MVME761 TXD RTS RXD CTS DCD TRXC RTXC DTR LLB RLB DSR RI TM P2 P2MX Z85230 SCC Z8536 CIO EIA232 DTE SIM J2 J3 3 2 1 J15 11552 00 9802 4 5 3 2 1 DTE MVME2603 2604 SERIES 2 4 5 3 24 15 17 18 21 22 25 6 7 HD26 8 20 ...

Page 48: ...that carries 8 bit SCSI signals from the MVME2603 2604 To run SCSI devices you may install an additional transition module that is equipped with a SCSI port such as the MVME712B Preparation of the P2 adapter for the MVME761 consists of installing a jumper on header J1 to enable the SCSI terminating resistors if necessary Figure 1 16 illustrates the location of the jumper header resistors fuse and ...

Page 49: ...sition module and the P2 adapter refer to the userÕs manual for the MVME761 listed in the Related Documentation appendix as necessary Figure 1 16 MVME761 P2 Adapter Three Row Component Placement C B A 2 1 J1 J2 J3 2 1 1 64 63 50 49 R1 C1 U1 9 25 17 CR1 R2 C2 C3 C4 C5 U2 C6 C7 P1 C B A 1 32 1933 9610 ...

Page 50: ...s both 8 and 16 bit SCSI The P2 adapter for the MVME761 also supports PMC I O via connectors J3 and J4 Preparation of the P2 adapter for the MVME761 consists of installing a jumper on header J5 to enable the SCSI terminating resistors if necessary Figure 1 16 1 illustrates the location of the jumper header and connectors For further information on the preparation of the transition module and the P...

Page 51: ...accessible with the mezzanines installed Should it be necessary to install mezzanines on the base board refer to the following sections for a brief description of the installation procedure ESD Precautions Motorola strongly recommends that you use an antistatic wrist strap and a conductive foam pad when installing or upgrading a system Electronic components such as disk drives computer boards and ...

Page 52: ... operating system shutdown Turn the AC or DC power off and remove the AC cord or DC power lines from the system Remove chassis or system cover s as necessary for access to the VMEmodules Caution Inserting or removing modules with power applied may result in damage to module components Warning Dangerous voltages capable of causing death are present in this equipment Use extreme caution when handlin...

Page 53: ...n MVME2603 2604 5 Insert the four short Phillips screws through the holes at the corners of the RAM200 into the standoffs on the MVME2603 2604 Tighten the screws 6 Reinstall the MVME2603 2604 assembly in its proper card slot Be sure the module is well seated in the backplane connectors Do not damage or bend connector pins 7 Replace the chassis or system cover s reconnect the system to the AC or DC...

Page 54: ...ating system shutdown Turn the AC or DC power off and remove the AC cord or DC power lines from the system Remove chassis or system cover s as necessary for access to the VMEmodules Caution Inserting or removing modules with power applied may result in damage to module components Warning Dangerous voltages capable of causing death are present in this equipment Use extreme caution when handling tes...

Page 55: ... connect smoothly with the corresponding connectors J11 12 13 14 on the MVME2603 2604 6 Insert the two short Phillips screws through the holes at the forward corners of the PMC module into the standoffs on the MVME2603 2604 Tighten the screws 7 Reinstall the MVME2603 2604 assembly in its proper card slot Be sure the module is well seated in the backplane connectors Do not damage or bend connector ...

Page 56: ...stem shutdown Turn the AC or DC power off and remove the AC cord or DC power lines from the system Remove chassis or system cover s as necessary for access to the VMEmodules Caution Inserting or removing modules with power applied may result in damage to module components Warning Dangerous voltages capable of causing death are present in this equipment Use extreme caution when handling testing and...

Page 57: ... Installation 1 41 1 Figure 1 20 PMC Carrier Board Placement on MVME2603 2604 5 Remove the LED module screw located at the upper front corner of the base board Install a short 0 394 inch standoff in its place 11661 00 9611 1 3 ...

Page 58: ...ors Do not damage or bend connector pins 10 Replace the chassis or system cover s reconnect the system to the AC or DC power source and turn the equipment power on MVME2603 2604 VMEmodule Installation With mezzanine board s installed and headers properly configured proceed as follows to install the MVME2603 2604 in the VME chassis 1 Attach an ESD strap to your wrist Attach the other end of the ESD...

Page 59: ...e IACK daisy chain driver Ð If you do not intend to use the MVME2603 2604 as system controller it can occupy any unused double height card slot 4 Slide the MVME2603 2604 into the selected card slot Be sure the module is well seated in the P1 and P2 connectors on the backplane Do not damage or bend connector pins Caution Avoid touching areas of integrated circuitry static discharge can damage these...

Page 60: ...pplies to MVME712M compatible models of the MVME2603 2604 VMEmodule With the MVME2603 2604 installed refer to Figure 1 22 and proceed as follows to install an MVME712M transition module 1 Attach an ESD strap to your wrist Attach the other end of the ESD strap to the chassis as a ground The ESD strap must be secured to your wrist and to ground throughout the procedure 2 Perform an operating system ...

Page 61: ...ransition module Be sure to orient cable pin 1 with connector pin 1 Caution Avoid touching areas of integrated circuitry static discharge can damage these circuits 6 Secure the MVME712M in the chassis with the screws provided making good contact with the transverse mounting rails to minimize RF emissions 7 Referring to the userÕs manual for the MVME712M listed in the Related Documentation appendix...

Page 62: ...stem cover s making sure no cables are pinched Cable the peripherals to the panel connectors reconnect the system to the AC or DC power source and turn the equipment power on Note Not all peripheral cables are provided with the MVME712M you may need to fabricate or purchase certain cables To minimize radiation Motorola recommends shielded cable for peripheral connections where possible ...

Page 63: ...12M MVME2603 2604 Cable Connections J6 J2 SCSI DEVICE MVME2600 P1 P2 J3 ENCLOSURE BOUNDARY TERMINATORS INSTALLED TERMINATORS REMOVED 50 CONDUCTOR CABLE TERMINATORS INSTALLED MVME712M cb2349301 SCSI DEVICE P2 ADAPTER P2 T J3 J2 J9 J7 J8 J10 J4 J5 64 CONDUCTOR CABLE ...

Page 64: ...move chassis or system cover s as necessary for access to the VMEmodules Caution MVME2600 1XXX MVME761 compatible models will be damaged if they are mistakenly connected to the MVME712 family of boards instead of the correct MVME761 transition modules Caution Inserting or removing modules with power applied may result in damage to module components Warning Dangerous voltages capable of causing dea...

Page 65: ... with the MVME761 from J3 on the P2 adapter board to P2 on the transition module Be sure to orient cable pin 1 with connector pin 1 Caution Avoid touching areas of integrated circuitry static discharge can damage these circuits MVME2600 MVME3600 P1 P2 J2 ENCLOSURE BOUNDARY 11635 00 9610 P2 ADAPTER P2 J3 64 CONDUCTOR CABLE P2 MVME761 001 ...

Page 66: ...connect the system to the AC or DC power source and turn the equipment power on Note Not all peripheral cables are provided with the MVME761 you may need to fabricate or purchase certain cables To minimize radiation Motorola recommends shielded cable for peripheral connections where possible System Considerations The MVME2603 2604 draws power from VMEbus backplane connectors P1 and P2 P2 is also u...

Page 67: ...waits forever for the VMEbus cycle to complete This will cause the system to lock up There is only one situation in which the system might lack this global bus timeout when the MVME2603 2604 is not the system controller and there is no global bus timeout elsewhere in the system Multiple MVME2603 2604s may be installed in a single VME chassis In general hardware multiprocessor features are supporte...

Page 68: ...wer through a 1A fuse F1 located on the P2 adapter board If the fuse is blown the SCSI device s may function erratically or not at all With the P2 adapter board cabled to a transition module and with an SCSI bus connected to the transition module the green SCSI LED on the module illuminates when SCSI terminator power is available If the SCSI LED on the transition module flickers during SCSI bus op...

Page 69: ...ard the standard serial console port COM1 serves as the PPCBug debugger console port The firmware console should be set up as follows Eight bits per character One stop bit per character Parity disabled no parity Baud rate of 9600 baud 9600 baud is the power up default for serial ports on MVME2603 2604 boards After power up you can reconfigure the baud rate if you wish using the PPCBug PF Port Form...

Page 70: ...System Considerations 1 54 1 ...

Page 71: ...ower up the system The MPU hardware and firmware initialization process is performed by the PowerPCª PPCBug power up or system reset The firmware initializes the devices on the SBC module in preparation for booting the operating system The firmware is shipped from the factory with an appropriate set of defaults In most cases there is no need to modify the firmware configuration before you boot the...

Page 72: ...S1 When activated by software the ABORT switch can generate an interrupt signal from the base board to the processor at a user programmable level The interrupt is normally used to abort program execution and return control to the debugger firmware located in the MVME2603 2604 ROM and Flash memory The interrupt signal reaches the processor module via ISA bus interrupt STARTUP SYSTEM INITIALIZATION ...

Page 73: ...t by asserting the VMEbus signal SYSRESET A SYSRESET signal may be generated by the RESET switch a power up reset a watchdog timeout or by a control bit in the Miscellaneous Control Register MISC_CTL in the Universe ASIC SYSRESET remains asserted for at least 200 ms as required by the VMEbus specification Similarly the Universe ASIC supplies an input signal and a control bit to initiate a local re...

Page 74: ...bus is active PCI DS4 green PCI activity lights when the IRDY Initiator Ready signal line on the PCI bus is active This indicates that the PCI mezzanine if installed is active FUS DS5 green Fuse OK lights when 5Vdc 12Vdc and Ð12Vdc power is available from the base board to the transition module and remote devices Note Because the FUS LED monitors the status of several voltages on the MVME2603 2604...

Page 75: ...omputer ProgrammerÕs Reference Guide part number V2600A PG Processor Memory Map The processor memory map configuration is under the control of the Raven bridge controller ASIC and the Falcon memory controller chip set The Raven and Falcon devices adjust system mapping to suit a given application via programmable map decoder registers At system power up or reset a default processor memory map takes...

Page 76: ...part number V2600A PG PCI Local Bus Memory Map The PCI memory map is controlled by the Raven MPU PCI bus bridge controller ASIC and by the Universe PCI VME bus bridge ASIC The Raven and Universe devices adjust system mapping to suit a given application via programmable map decoder registers No default PCI memory map exists Resetting the system turns the PCI map decoders off and they must be reprog...

Page 77: ...rface The address translation capabilities of the Universe enable the processor to access any range of addresses on the VMEbus Recommendations for VMEbus mapping including suggested CHRP and PREP compatible memory maps can be found in the MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide part number V2600A PG The following figure shows the overall mapping approach from the standpo...

Page 78: ...16 PROGRAMMABLE SPACE PCI MEMORY PROCESSOR PCI MEMORY SPACE PCI ISA MEMORY SPACE PCI I O SPACE MPC RESOURCES NOTE 1 NOTE 1 NOTE 2 NOTE 3 ONBOARD MEMORY 1 Programmable mapping done by Raven ASIC 2 Programmable mapping performed via PCI Slave images in Universe ASIC 3 Programmable mapping performed via Special Slave image SLSI in Universe ASIC NOTES ...

Page 79: ...upport for these seven types of devices The PIB supports flexible arbitration modes of fixed priority rotating priority and mixed priority as appropriate in a given application Details on PCI arbitration can be found in the MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide part number V2600A PG The arbitration assignments for the MVME2603 2604 are shown in the following table Tabl...

Page 80: ... The Raven ASIC itself timer interrupts or transfer error interrupts The processor processor self interrupts The Falcon chip set memory error interrupts The PCI bus interrupts from PCI devices The ISA bus interrupts from ISA devices The following figure illustrates interrupt architecture on the MVME2603 2604 For details on interrupt handling refer to the MVME2600 Series Single Board Computer Progr...

Page 81: ...Operating Instructions 2 11 2 Figure 2 3 MVME2603 MVME2604 Interrupt Architecture 11559 00 9609 PIB 8529 Pair Processor INT_ MCP_ RavenMPIC INT SERR_ PERR_ PCI Interrupts ISA Interrupts ...

Page 82: ...Ebus when the MVME2603 2604 is system controller 4 ALT_RST function controlled by the Port 92 register in the PIB resets the VMEbus when the MVME2603 2604 is system controller 5 PCI ISA I O Reset function controlled by the Clock Divisor register in the PIB Table 2 3 IBC DMA Channel Assignments IBC Priority IBC Label Controller DMA Assignment 1 Channel 0 DMA1 Serial Port 3 Receiver Z85230 Port A Rx...

Page 83: ...e g AIX software The PowerPC processor and the VMEbus are inherently big endian while the PCI bus is inherently little endian The following sections summarize how the MVME2603 2604 handles software and hardware differences in big and little endian operations For further details on endian considerations refer to the MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide part number V260...

Page 84: ...ogrammed to operate in big endian mode with the processor and the memory subsystem In little endian mode the Raven reverse rearranges the address for PCI bound accesses and rearranges the address for memory bound accesses from PCI In this case no byte swapping is done PCI Domain The PCI bus is inherently little endian All devices connected directly to the PCI bus operate in little endian mode rega...

Page 85: ...ing in both directions from PCI to VMEbus and from VMEbus to PCI to maintain address invariance regardless of the mode of operation in the processorÕs domain VMEbus Domain The VMEbus is inherently big endian All devices connected directly to the VMEbus must operate in big endian mode regardless of the mode of operation in the processorÕs domain In big endian mode byte swapping is performed first b...

Page 86: ...Programming Considerations 2 16 2 ...

Page 87: ...number V2600A PG Refer to it for a functional description of the MVME2603 2604 in greater depth Features The following table summarizes the features of the MVME2603 2604 single board computers Table 3 1 MVME2603 2604 Features Feature Description Microprocessor MPC603 PowerPCTM processor MVME2603 n1n1 models MPC604 PowerPCTM processor MVME2604 n1n1 models ECC DRAM 16MB 256MB on RAM200 module L2 cac...

Page 88: ...bidirectional parallel port PC87308 SIO via P2 and transition module SCSI I O MVME712M compatible models 8 bit 16 bit single ended fast SCSI 2 interface SYM53C825A via P2 and transition module MVME761 compatible models 8 bit 16 bit single ended fast SCSI 2 interface SYM53C825A via P2 Ethernet I O MVME712M compatible models AUI connections via P2 and transition module MVME761 compatible models 10Ba...

Page 89: ...ecture allows relatively easy upgrades in memory and functionality A key feature of the MVME2603 2604 family is the PCI Peripheral Component Interconnect bus In addition to the on board local bus peripherals the PCI bus supports an industry standard mezzanine interface IEEE P1386 1 PMC PCI Mezzanine Card PMC modules offer a variety of possibilities for I O expansion through FDDI Fiber Distributed ...

Page 90: ...General Description 3 4 3 Mode graphics Ethernet or SCSI ports The base board supports PMC front panel I O There is also provision for additional expansion via a PMC carrier board ...

Page 91: ...Figure 3 1 MVME2603 2604 Block Diagram NVRAM RTC 11540 00 96111 3 3 PS 2 Floppy 33MHz 32 64 BIT PCI Local Bus Processor L2 Cache Parallel Keyboard Mouse Async Serial ISA CSR PIB Raven Ethernet SCSI VME PMC PCIX PMC Slot 1 Slot 2 60X System Bus ISA Local Resource Bus Falcon Falcon Dram FLASH Sys CSR Sync Serial ISA SIO ...

Page 92: ...onnectors The SCSI bus is 8 bits wide in VME systems that do not support the extension Refer to the MVME712M User s Manual for the pin assignments of the SCSI connectors used on the transition module Refer to the Symbios 53C825A data manual for detailed programming information SCSI Termination The individual configuring the system must ensure that the SCSI bus is properly terminated at both ends I...

Page 93: ...assigned to the board i e every board has a different value for xxxxx Each MVME2603 2604 displays its Ethernet station address on a label attached to the base board in the PMC connector keepout area just behind the front panel In addition the six bytes including the Ethernet station address are stored in an SROM off the DECchip Ethernet controller That is the value 08003E2xxxxx is stored in SROM A...

Page 94: ...TM Asynchronous Transfer Mode graphics Ethernet or SCSI ports The base board supports PMC front panel and rear P2 I O There is also provision for stacking a PMC carrier board on the base board for additional expansion The MVME2603 2604 supports one PMC slot Four 64 pin connectors on the base board J11 J12 J13 and J14 interface with 32 bit IEEE P1386 1 PMC compatible mezzanines to add any desirable...

Page 95: ...to PCI bus interface The DMA controller functions of the local VMEbus The Universe chip includes Universe Control and Status Registers UCSRs for interprocessor communications It can provide the VMEbus system controller functions as well For detailed programming information refer to the Universe UserÕs Manual and to the discussions in the MVME2603 2604 Programmer s Reference Guide ISA Super I O Dev...

Page 96: ...k Diagram 3 10 3 Ð IEEE1284 bidirectional parallel port in MVME761 compatible models Floppy disk drive support via drive power connector J4 Keyboard and mouse interface via circular DIN connectors J6 and J8 ...

Page 97: ...ammer s Reference Guide and to the vendor documentation for the ISASIO device Parallel Port The parallel port is a Centronics printer interface in MVME712M compatible models and a full IEEE1284 bidirectional parallel port in MVME761 compatible models Both versions are implemented with the ISASIO device All parallel I O interface signals are routed to P2 through series damping resistors Hardware in...

Page 98: ...the ISASIO controller The ISASIO device may be used to support any of the following devices 31 2 inch 1 44MB floppy disk drive 51 4 inch 1 2MB floppy disk drive Standard 250kbps to 2Mbps tape drive system Keyboard and Mouse Interface The National Semiconductor PC87308 ISASIO chip used to implement certain segments of the P2 and front panel I O provides ROM based keyboard and mouse interface contro...

Page 99: ...y programmable DMA channels One 16 bit timer Three interval counters timers Accesses to the configuration space for the PIB PCI ISA Bridge controller are performed by way of the CONADD and CONDAT Configuration Address and Data registers in the Raven bridge controller ASIC The registers are located at offsets CF8 and CFC respectively from the PCI I O base address Real Time Clock NVRAM Timer Functio...

Page 100: ...rammer s Reference Guide and to the M48T59 T559 data sheet for detailed programming and battery life information Programmable Timers Among the resources available to the local processor are a number of programmable timers Timers are incorporated into the PIB controller and the Z8536 CIO device diagrammed in Figure 1 1 and Figure 3 1 They can be programmed to generate periodic interrupts to the pro...

Page 101: ...mmunications Controller to implement the two serial communications interfaces which are routed through P2 The Z85230 supports synchronous SDLC HDLC and asynchronous protocols The MVME2603 2604 hardware supports asynchronous serial baud rates of 110B s to 38 4KB s Each interface supports the CTS DCD RTS and DTR control signals as well as the TxD and RxD transmit receive data signals and TxC RxC syn...

Page 102: ...n 8 bit read only register register located on the base board at ISA I O address 0802 SCCP Z85230 ESCC present If set there is no on board synchronous serial support the ESCC is not present If cleared the Z85230 ESCC is installed and there is on board support for synchronous serial communication PMC2P PMC PMCIX slot 2 present If set no PCI mezzanine card or PCI expansion device is installed in PMC...

Page 103: ... capacity The signals affected are synchronous I O control signals that pass between the base board and the MVME761 transition module The multiplexing is a hardware function that is entirely transparent to software Four signals are involved in the P2 multiplexing function MXDO MXDI MXCLK and MXSYNC MXDO is a time multiplexed data output line from the main board and MXDI is a time multiplexed line ...

Page 104: ...8 The signal is also available at pin PB7 of the Z8536 CIO device which handles various status signals serial I O lines and counters The interrupter connected to the ABORT switch is an edge sensitive circuit filtered to remove switch bounce Table 3 2 P2 Multiplexing Sequence MXDO From Base Board MXDI From MVME761 Time Slot Signal Name Time Slot Signal Name 0 RTS3 0 CTS3 1 DTR3 1 DSR3 MID1 2 LLB3 M...

Page 105: ...CPU DS3 green CPU activity lights when the DBB Data Bus Busy signal line on the processor bus is active PCI DS4 green PCI activity lights when the IRDY Initiator Ready signal line on the PCI bus is active This indicates that the PCI mezzanine or carrier board if installed is active FUS DS5 green Fuse OK lights when 5Vdc 12Vdc and Ð12Vdc power is available from the base board to the transition modu...

Page 106: ... base boardÕs keyboard and mouse connectors through polyswitch R30 and to the 14 pin combined LED mezzanine remote reset connector J1 The FUS LED DS5 on the MVME2603 2604 front panel illuminates when all three voltages are available In MVME712M I O mode the yellow DS1 LED on the MVME712M also signals the availability of 12Vdc LAN power indicating in turn that polyswitch R34 is good If the Ethernet...

Page 107: ...witch resettable fuse located on the P2 adapter board Speaker Control The MVME2603 2604 base board supplies a SPEAKER_OUT signal to the 14 pin combined LED mezzanine remote reset connector J1 When J1 is used as a remote reset connector with the LED mezzanine removed the SPEAKER_OUT signal can be cabled to an external speaker to obtain a beep tone For the pin assignments of J1 refer to Table 4 1 PM...

Page 108: ...e RAM200 memory mezzanine accommodates 4MB or 8MB of additional 64 bit Flash memory The onboard monitor debugger PPCBug resides in the Flash chips PPCBug provides functionality for Booting the operating system Initializing after a reset Displaying and modifying configuration variables Running self tests and diagnostics Updating firmware ROM Under normal operation the Flash devices are in Òread onl...

Page 109: ...in 64 bit Flash memory A jumper header J10 tells the Falcon chip set where in memory to fetch the board reset vector Depending on the configuration of J10 resets execute either from Flash memory bank A or from bank B MVME712M Transition Module The MVME712M transition module Figure 1 3 and P2 adapter board are used in conjunction with the following models of the MVME2603 2604 base board MVME2603 21...

Page 110: ...he 5Vdc present at connector P2 A 64 pin DIN connector to interface the EIA 232 D parallel SCSI and Ethernet signals to the MVME712M MVME761 Transition Module The MVME761 transition module Figure 1 12 and P2 adapter board are used in conjunction with the following models of the MVME2603 2604 base board MVME2603 1121A MVME2604 1121A MVME2603 1131A MVME2604 1131A MVME2603 1141A MVME2604 1141A MVME26...

Page 111: ...ll plug in printed circuit boards which contain all the circuitry needed to convert a TTL level port to the standard voltage levels needed by various industry standard serial interfaces such as EIA 232 EIA 530 etc SIMs are available for the following configurations For additional information about the serial interface modules refer to the MVME761 UserÕs Manual listed in the Related Documentation a...

Page 112: ...Block Diagram 3 26 3 ...

Page 113: ...pecific to MVME712M compatible versions of the base board Connector Table LED Mezzanine connector J1 4 1 Debug connector J2 4 2 Floppy LED connector J4 4 3 PCI Expansion connector J5 4 4 Keyboard and Mouse connectors J6 J8 4 5 4 6 DRAM Mezzanine connector J7 4 7 PCI Mezzanine connectors J11 12 13 14 4 8 VMEbus connector P1 4 9 Connector Table VMEbus connector P2 4 10 SCSI connector at MVME712M 4 1...

Page 114: ...nterconnect signals consult the support information documentation package for the MVME2603 2604 single board computer or the support information sections of the transition module documentation as necessary Connector Table VMEbus connector P2 4 15 Serial Ports 1 and 2 at MVME761 4 16 Serial Ports 3 and 4 at MVME761 4 17 Parallel I O connector at MVME761 4 18 Ethernet 10Base T 100Base TX connector a...

Page 115: ...rvice as a remote status and control connector In this application J1 can be connected to a user supplied external cable to carry the Reset and Abort signals and the LED lines to a control panel located apart from the MVME2603 2604 Maximum cable length is 15 feet The pin assignments are as follows Debug Connector J2 A 190 pin connector J2 on the MVME2603 2604 base board provides access to the proc...

Page 116: ...3 24 25 PA24 PA25 26 27 PA26 PA27 28 29 PA28 PA29 30 31 PA30 PA31 32 33 PA_PAR0 PA_PAR1 34 35 PA_PAR2 PA_PAR3 36 37 APE RSRV 38 39 PD0 PD1 40 41 PD2 PD3 42 43 PD4 PD5 44 45 PD6 PD7 46 47 PD8 PD9 48 49 PD10 PD11 50 51 PD12 PD13 52 53 PD14 PD15 54 55 PD16 PD17 56 57 PD18 5V PD19 58 59 PA20 PD21 60 61 PD22 PD23 62 63 PD24 PD25 64 65 PD26 PD27 66 67 PD28 PD29 68 69 PD30 PD31 70 71 PD32 PD33 72 73 PD34...

Page 117: ...5 108 109 PDPAR6 PDPAR7 110 111 No Connection No Connection 112 113 DPE DBDIS 114 115 TT0 TSIZ0 116 117 TT1 TSIZ1 118 119 TT2 TSIZ2 120 121 TT3 TC0 122 123 TT4 TC1 124 125 CI TC2 126 127 WT CSE0 128 129 GLOBAL CSE1 130 131 SHARED DBWO 132 133 AACK 3 3V TS 134 135 ARTY XATS 136 137 DRTY TBST 138 139 TA No Connection 140 141 TEA No Connection 142 143 No Connection DBG 144 145 No Connection DBB 146 1...

Page 118: ...ALTED N C 164 165 L2HIT TLBISYNC 166 167 L2TALE TBEN 168 169 L2TALOE SUSPEND 170 171 L2TOE GND DRVMOD0 172 173 L2TWE DRVMOD1 N C 174 175 L2TV NAPRUN N C 176 177 L2PRSNT1 QREQ 178 179 SRESET QACK 180 181 HRESET CPUTDO 182 183 GND CPUTDI 184 185 CPUCLK1 CPUTCK 186 187 CPUCLK2 CPUTMS 188 189 CPUCLK3 CPUTRST 190 Table 4 2 Debug Connector Continued ...

Page 119: ...ed in the following table Table 4 3 Floppy LED Connector 1 5VF 5VF 2 3 LEDDISP0 LEDDISP1 4 5 LEDDISP2 LEDDISP3 6 7 LEDDISP4 LEDDISP5 8 9 LEDDISP6 LEDDISP7 10 11 LEDDISP8 LEDDISP9 12 13 LEDDISP10 LEDDISP11 14 15 LEDDISP12 LEDDISP13 16 17 LEDDISP14 LEDDISP15 18 19 LEDBLNK F_DENSEL 20 21 GND F_MSEN0 22 23 GND F_INDEX 24 25 GND F_MTR0 26 27 GND F_DR1 28 29 GND F_DR0 30 31 GND F_MTR1 32 33 GND F_DIR 34...

Page 120: ...I Expansion Connector 1 3 3V 3 3V 2 3 PCICLK3 PMCINTA 4 5 GND PMCINTB 6 7 PURESET PMCINTC 8 9 HRESET PMCINTD 10 11 PMC2DO PHYTDO 12 13 TMS TCK 14 15 TRST PMC2P 16 17 PMC2GNT PMC2REQ 18 19 12V GND Ð12V 20 21 PERR SERR 22 23 LOCK SDONE 24 25 DEVSEL SBO 26 27 GND GND 28 29 TRDY IRDY 30 31 STOP FRAME 32 33 GND GND 34 35 ACK64 Reserved 36 37 REQ64 Reserved 38 39 PAR PCIRST 40 41 CBE1 CBE0 42 43 CBE3 CB...

Page 121: ...rved 78 79 CBE5 CBE4 80 81 CBE7 CBE6 82 83 AD33 AD32 84 85 AD35 AD34 86 87 AD37 AD36 88 89 AD39 AD39 90 91 AD41 AD40 92 93 AD43 AD42 94 95 AD45 GND AD44 96 97 AD47 AD46 98 99 AD49 AD48 100 101 AD51 AD50 102 103 AD53 AD52 104 105 AD55 AD54 106 107 AD57 AD56 108 109 AD59 AD58 110 111 AD61 AD60 112 113 AD63 AD62 114 Table 4 4 PCI Expansion Connector Continued ...

Page 122: ... in the following two tables DRAM Mezzanine Connector J7 A 190 pin connector J7 on the MVME2603 2604 base board supplies the interface between the processor bus MPU bus and the RAM200 DRAM mezzanine The pin assignments are listed in the following table Table 4 5 Keyboard Connector 1 K_DATA 2 No Connection 3 GND 4 5VF 5 K_CLK 6 No Connection Table 4 6 Mouse Connector 1 M_DATA 2 No Connection 3 GND ...

Page 123: ...AL3 22 23 RAL4 RAL5 24 25 RAL6 RAL7 26 27 RAL8 RAL9 28 29 RAL10 RAL11 30 31 RAL12 RAU0 32 33 RAU1 RAU2 34 35 RAU3 RAU4 36 37 RAU5 RAU6 38 39 RAU7 RAU8 40 41 RAU9 RAU10 42 43 RAU11 RAU12 44 45 RDL0 RDL1 46 47 RDL2 RDL3 48 49 RDL4 RDL5 50 51 RDL6 RDL7 52 53 RDL8 RDL9 54 55 RDL10 RDL11 56 57 RDL12 5V RDL13 58 59 RDL14 RDL15 60 61 RDL16 RDL17 62 63 RDL18 RDL19 64 65 RDL20 RDL21 66 67 RDL22 RDL23 68 69...

Page 124: ...DL61 106 107 RDL62 RDL63 108 109 CDL0 CDL1 110 111 CDL2 CDL3 112 113 CDL4 CDL5 114 115 CDL6 CDL7 116 117 No Connection No Connection 118 119 RDU0 RDU1 120 121 RDU2 RDU3 122 123 RDU4 RDU5 124 125 RDU6 RDU7 126 127 RDU8 RDU9 128 129 RDU10 RDU11 130 131 RDU12 RDU13 132 133 RDU14 3 3V RDU15 134 135 RDU16 RDU17 136 137 RDU18 RDU19 138 139 RDU20 RDU21 140 141 RDU22 RDU23 142 143 RDU24 RDU25 144 145 RDU2...

Page 125: ...les on the next two pages 153 RDU34 RDU35 154 155 RDU36 RDU37 156 157 RDU38 RDU39 158 159 RDU40 RDU41 160 161 RDU42 RDU43 162 163 RDU44 RDU45 164 165 RDU46 RDU47 166 167 RDU48 RDU49 168 169 RDU50 RDU51 170 171 RDU52 GND RDU53 172 173 RDU54 RDU55 174 175 RDU56 RDU57 176 177 RDU58 RDU59 178 179 RDU60 RDU61 180 181 RDU62 RDU63 182 183 CDU0 CDU1 184 185 CDU2 CDU3 186 187 CDU4 CDU5 188 189 CDU6 CDU7 19...

Page 126: ... 24 23 AD24 3 3V 24 25 GND CBE3 26 25 IDSEL AD23 26 27 AD22 AD21 28 27 3 3V AD20 28 29 AD19 5V 30 29 AD18 GND 30 31 5V AD17 32 31 AD16 CBE2 32 33 FRAME GND 34 33 GND Not Used 34 35 GND IRDY 36 35 TRDY 3 3V 36 37 DEVSEL 5V 38 37 GND STOP 38 39 GND LOCK 40 39 PERR GND 40 41 SDONE SBO 42 41 3 3V SERR 42 43 PAR GND 44 43 CBE1 GND 44 45 5V AD15 46 45 AD14 AD13 46 47 AD12 AD11 48 47 GND AD10 48 49 AD09 ...

Page 127: ...19 AD57 GND 20 19 PMCIO18 PMCIO19 20 21 5V AD56 22 21 PMCIO20 PMCIO21 22 23 AD55 AD54 24 23 PMCIO22 PMCIO23 24 25 AD53 GND 26 25 PMCIO24 PMCIO25 26 27 GND AD52 28 27 PMCIO26 PMCIO27 28 29 AD51 AD50 30 29 PMCIO28 PMCIO29 30 31 AD49 GND 32 31 PMCIO30 PMCIO31 32 33 GND AD48 34 33 Not Used Not Used 34 35 AD47 AD46 36 35 Not Used Not Used 36 37 AD45 GND 38 37 Not Used Not Used 38 39 5V AD44 40 39 Not U...

Page 128: ... 13 Not Used VDS0 VBR1 VLWORD VMEGA2 13 14 GND VWRITE VBR2 VAM5 Not Used 14 15 Not Used GND VBR3 VA23 VMEGA3 15 16 GND VDTACK VAM0 VA22 Not Used 16 17 Not Used GND VAM1 VA21 VMEGA4 17 18 GND VAS VAM2 VA20 Not Used 18 19 Not Used GND VAM3 VA19 Not Used 19 20 GND VIACK GND VA18 Not Used 20 21 Not Used VIACKIN VSERCLK VA17 Not Used 21 22 GND VIACKOUT VSERDAT VA16 Not Used 22 23 Not Used VAM4 GND VA15...

Page 129: ... 24 bit addressing and 16 bit data Its pin assignments are set by the VMEbus specification P2 rows A C Z and D provide power and interface signals to the MVME712M transition module P2 row B supplies the MVME2603 2604 with power with the upper eight VMEbus address lines and with an additional 16 VMEbus data lines The pin assignments for P2 are listed in Table 4 10 SCSI Connector MVME712M I O Mode T...

Page 130: ...4 SRST 5V PR_DATA4 PMCIO12 13 14 GND SMSG VD16 PR_DATA5 PMCIO13 14 15 SDB15 SSEL VD17 PR_DATA6 PMCIO14 15 16 GND SCD VD18 PR_DATA7 PMCIO15 16 17 SDBP1 SREQ VD19 PR_ACK PMCIO16 17 18 GND SIO VD20 PR_BUSY PMCIO17 18 19 Not Used TxD3 VD21 PR_PE PMCIO18 19 20 GND RxD3 VD22 PR_SLCT PMCIO19 20 21 Not Used RTS3 VD23 PR_INIT PMCIO20 21 22 GND CTS3 GND PR_ERR PMCIO21 22 23 Not Used DTR3 VD24 TxD1 PMCIO22 2...

Page 131: ...GND DB03 29 5 GND DB04 30 6 GND DB05 31 7 GND DB06 32 8 GND DB07 33 9 GND DBP 34 10 GND GND 35 11 GND GND 36 12 GND GND 37 13 Reserved TERMPWR 38 14 GND GND 39 15 GND GND 40 16 GND ATN 41 17 GND GND 42 18 GND BSY 43 19 GND ACK 44 20 GND RST 45 21 GND MSG 46 22 GND SEL 47 23 GND D C 48 24 GND REQ 49 25 GND O I 50 ...

Page 132: ...The pin assignments for serial ports 1 4 on the MVME712M are listed in the following table Table 4 12 Serial Connections MVME712M Ports 1 4 1 No Connection 2 ETxDn 3 ERxDn 4 ERTSn 5 ECTSn 6 EDSRn 7 GND 8 EDCDn 9 No Connection 10 No Connection 11 No Connection 12 No Connection 13 No Connection 14 No Connection 15 ERTxC Port 4 only 16 No Connection 17 ERRxC Port 4 only 18 No Connection 19 No Connect...

Page 133: ... MVME712M transition module The pin assignments are listed in the following table Table 4 13 Parallel I O Connector MVME712M 1 PRSTB GND 19 2 PRD0 GND 20 3 PRD1 GND 21 4 PRD2 GND 22 5 PRD3 GND 23 6 PRD4 GND 24 7 PRD5 GND 25 8 PRD6 GND 26 9 PRD7 GND 27 10 PRACK GND 28 11 PRBSY GND 29 12 PRPE GND 30 13 PRSEL INPRIME 31 14 No Connection PRFAULT 32 15 No Connection No Connection 33 16 GND No Connectio...

Page 134: ...e boards the LAN interface is an AUI connection implemented with a DB15 connector J6 located on the MVME712M transition module The pin assignments are listed in the following table Table 4 14 Ethernet AUI Connector MVME712M 1 GND 2 C 3 T 4 GND 5 R 6 GND 7 No Connection 8 No Connection 9 CÐ 10 TÐ 11 No Connection 12 RÐ 13 12V 14 No Connection 15 No Connection ...

Page 135: ... P1 and P2 supply the interface between the base board and the VMEbus P1 provides power and VME signals for 24 bit addressing and 16 bit data Its pin assignments are set by the VMEbus specification P2 rows A C Z and D provide power and interface signals to the MVME761 transition module P2 row B supplies the MVME2603 2604 with power with the upper eight VMEbus address lines and with an additional 1...

Page 136: ...IO11 12 13 SDB14 SRST 5V PR_DATA4 PMCIO12 13 14 GND SMSG VD16 PR_DATA5 PMCIO13 14 15 SDB15 SSEL VD17 PR_DATA6 PMCIO14 15 16 GND SCD VD18 PR_DATA7 PMCIO15 16 17 SDBP1 SREQ VD19 PR_ACK PMCIO16 17 18 GND SIO VD20 PR_BUSY PMCIO17 18 19 Not Used AFD VD21 PR_PE PMCIO18 19 20 GND SLIN VD22 PR_SLCT PMCIO19 20 21 Not Used TxD3 VD23 PR_INIT PMCIO20 21 22 GND RxD3 GND PR_ERR PMCIO21 22 23 Not Used RTxC3 VD24...

Page 137: ...al connections For the MVME761 compatible versions of the base board the asynchronous interface is implemented with a pair of DB9 connectors COM1 and COM2 located on the MVME761 transition module The pin assignments are listed in the following table Table 4 16 Serial Connections Ports 1 and 2 MVME761 1 SPnDCD 2 SPnRxD 3 SPnTxD 4 SPnDTR 5 GND 6 SPnDSR 7 SPnRTS 8 SPnCTS 9 SPnRI ...

Page 138: ...d J8 located on the front panel of the transition module The pin assignments for serial ports 3 and 4 are listed in the following table Table 4 17 Serial Connections Ports 3 and 4 MVME761 1 No Connection 2 TXDn 3 RXDn 4 RTSn 5 CTSn 6 DSRn 7 GND 8 DCDn 9 SPn_P9 10 SPn_P10 11 SPn_P11 12 SPn_P12 13 SPn_P13 14 SPn_P14 15 TXCIn 16 SPn_P16 17 RXCIn 18 LLBn 19 SPn_P19 20 DTRn 21 RLBn 22 RIn 23 SPn_P23 24...

Page 139: ...ector J10 located on the MVME761 transition module The pin assignments are listed in the following table Table 4 18 Parallel I O Connector MVME761 1 PRBSY GND 19 2 PRSEL GND 20 3 PRACK GND 21 4 PRFAULT GND 22 5 PRPE GND 23 6 PRD0 GND 24 7 PRD1 GND 25 8 PRD2 GND 26 9 PRD3 GND 27 10 PRD4 GND 28 11 PRD5 GND 29 12 PRD6 GND 30 13 PRD7 GND 31 14 INPRIME GND 32 15 PRSTB GND 33 16 SELIN GND 34 17 AUTOFD G...

Page 140: ...J45 socket located on the MVME761 transition module The pin assignments are listed in the following table For detailed descriptions of the various interconnect signals consult the support information documentation package for the MVME2603 2604 SBC or the support information sections of the transition module documentation as necessary Table 4 19 Ethernet 10Base T 100Base TX Connector MVME761 1 TD 2...

Page 141: ...n of memory breakpoint and tracing capabilities a powerful assembler and disassembler useful for patching programs and a ÔÔself test at power upÕÕ feature which verifies the integrity of the main CPU board Various PPCBug routines that handle I O data conversion and string functions are available to user programs through the System Call handler PPCBug consists of three parts A command driven user i...

Page 142: ...bler and the passing of arguments to the system calls Memory Requirements PPCBug requires a maximum of 768KB maybe less of read write memory i e DRAM The debugger allocates this space from the top of memory For example a system containing 64MB 04000000 of read write memory will place the PPCBug memory page at locations 03F80000 to 03FFFFFF PPCBug Implementation PPCBug is written largely in the C p...

Page 143: ...or example GO then control may or may not return to the debugger depending on what the user program does For example if a breakpoint has been specified then control returns to the debugger when the breakpoint is encountered during execution of the user program Alternately the user program could return to the debugger by means of the System Call Handler routine RETURN described in the PPCBug Firmwa...

Page 144: ... Table 5 1 Debugger Commands Command Description AS One Line Assembler BC Block of Memory Compare BF Block of Memory Fill BI Block of Memory Initialize BM Block of Memory Move BR Breakpoint Insert NOBR Breakpoint Delete BS Block of Memory Search BV Block of Memory Verify CM Concurrent Mode NOCM No Concurrent Mode CNFG ConÞgure Board Information Block CS Checksum CSAR PCI ConÞguration Space READ Ac...

Page 145: ...ogram GT Go to Temporary Breakpoint HE Help IDLE Idle Master MPU IOC I O Control for Disk IOI I O Inquiry IOP I O Physical Direct Disk Access IOT I O Teach for ConÞguring Disk Controller IRD Idle MPU Register Display IRM Idle MPU Register Modify IRS Idle MPU Register Set LO Load S Records from Host MA Macro DeÞne Display NOMA Macro Delete MAE Macro Edit MAL Enable Macro Listing NOMAL Disable Macro...

Page 146: ...nter Detach PBOOT Bootstrap Operating System PF Port Format NOPF Port Detach PFLASH Program FLASH Memory PS Put RTC into Power Save Mode RB ROMboot Enable NORB ROMboot Disable RD Register Display REMOTE Remote RESET Cold Warm Reset RL Read Loop RM Register Modify RS Register Set RUN MPU Execution Status SD Switch Directories SET Set Time and Date SROM SROM Examine Modify SYM Symbol Table Attach NO...

Page 147: ...rase everything currently contained in Flash including the PPCBug debugger Note however that both banks A and B of Flash contain the PPCBug debugger TA Terminal Attach TIME Display Time and Date TM Transparent Mode TT Trace to Temporary Breakpoint VE Verify S Records Against Memory VER Revision Version Display WL Write Loop Table 5 1 Debugger Commands Continued Command Description ...

Page 148: ...on Falcon ECC Memory Controller Tests All boards ISABRDGE PCI ISA Bridge Tests All boards KBD8730x PC8730x Keyboard Mouse Tests All boards L2CACHE Level 2 Cache Tests All boards with L2 cache MPIC Multiprocessor Interrupt Controller Tests All boards NCR NCR 53C825 53C810 SCSI 2 I O Processor Tests All boards NVRAM Nonvolatile RAM Tests All boards PAR8730x PC8730x Parallel Port Test All boards PCIB...

Page 149: ...he hardware Use the PPCBug command CNFG to change those parameters Use the PPCBug command ENV to change configurable PPCBug parameters in NVRAM The CNFG and ENV commands are both described in the PPCBug Firmware Package User s Manual part number PPCBUGA1 UM Refer to that manual for general information about their use and capabilities The following paragraphs present additional information about CN...

Page 150: ...nsidered data strings and data strings are right justified The data strings are padded with zeroes if the length is not met The Board Information Block is factory configured before shipment There is no need to modify block parameters unless the NVRAM is corrupted Refer to the ProgrammerÕs Reference Guide part number V2600A PG for the actual location and other information about the Board Informatio...

Page 151: ...elow are the parameters that you can configure using ENV The default values shown were those in effect when this publication went to print Configuring the PPCBug Parameters The parameters that can be configured using ENV are Bug or System environment B S B Field Service Menu Enable Y N N B Bug is the mode where no system type of support is displayed However system related items are still available...

Page 152: ...r Control Register MPCR in shared RAM to pass and start execution of the cross loaded program B Use both the GCSR and the MPCR methods to pass and start execution of the cross loaded program Default N Do not use any Remote Start Method Y Accesses will be made to the appropriate system buses e g VMEbus local MPU bus to determine the presence of supported controllers Default N Accesses will not be m...

Page 153: ... as from a mass storage device N Do not enable PReP style network booting Default Y Negate the VMEbus SYSFAIL signal during board initialization N Negate the VMEbus SYSFAIL signal after successful completion or entrance into the bug command monitor Default Y Local SCSI bus is reset on debugger setup N Local SCSI bus is not reset on debugger setup Default A Asynchronous SCSI bus negotiation Default...

Page 154: ...topping the boot by use of the BREAK key The time value is from 0 255 seconds Default 5 seconds Auto Boot Enable Y N N Auto Boot at power up only Y N N Y Give boot priority to devices deÞned in the fw boot path global environment variable GEV N Do not give boot priority to devices listed in the fw boot path GEV Default Y Give boot priority to devices deÞned in the fw boot path GEV at power up rese...

Page 155: ...User s Manual for a listing of disk tape devices currently supported by PPCBug Default 00 Auto Boot Partition Number 00 Which disk ÒpartitionÓ is to be booted as speciÞed in the PowerPC Reference Platform PRP speciÞcation If set to zero the Þrmware will search the partitions in order 1 2 3 4 until it Þnds the Þrst ÒbootableÓ partition That is then the partition that will be booted Other acceptable...

Page 156: ...Boot Enable search of VMEbus Y N N ROM Boot Abort Delay 5 The time in seconds that the ROMboot sequence will delay before starting the boot The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key The time value is from 0 255 seconds Default 5 seconds ROM Boot Direct Starting Address FFF00000 The Þrst location tested when PPCBug searches for a ROMboot modul...

Page 157: ...uto Boot Abort Delay 5 The time in seconds that the NETboot sequence will delay before starting the boot The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key The time value is from 0 255 seconds Default 5 seconds Network Auto Boot Configuration Parameters Offset NVRAM 00001000 The address where the network interface conÞguration parameters are to be sav...

Page 158: ...om its default of 00001000 to the value you need to be clear of your data within NVRAM Memory Size Enable Y N Y Memory Size Starting Address 00000000 The default Starting Address is 00000000 Memory Size Ending Address 02000000 The default Ending Address is the calculated size of local memory If the memory start is changed from 00000000 this value will also need to be adjusted DRAM Speed in NANO Se...

Page 159: ...ngth 0 15 0 The value programmed into the MPC105 ÒROMNALÓ Þeld Memory Control ConÞguration Register 8 bits 28 31 to represent wait states in access time for nibble or burst mode ROM accesses The lowest allowable ROMNALsetting is 0 the highest allowable is F The value to enter depends on processor speed refer to your Processor Memory Mezzanine Module UserÕs Manual for appropriate values The default...

Page 160: ... Configuring the VMEbus Interface ENV asks the following series of questions to set up the VMEbus interface for the MVME2300 MVME2600 MVME3600 MVME4600 series modules To perform this configuration you should have a working knowledge of the Universe ASIC as described in the ProgrammerÕs Reference Guide VME3PCI Master Master Enable Y N Y PCI Slave Image 0 Control 00000000 The conÞgured value is writ...

Page 161: ...Image 1 Bound Address Register 20000000 The conÞgured value is written into the LSI1_BD register of the Universe chip PCI Slave Image 1 Translation Offset 00000000 The conÞgured value is written into the LSI1_TO register of the Universe chip PCI Slave Image 2 Control C0410000 The conÞgured value is written into the LSI2_CTL register of the Universe chip PCI Slave Image 2 Base Address Register 2000...

Page 162: ...ge 0 Control E0F20000 The conÞgured value is written into the VSI0_CTL register of the Universe chip VMEbus Slave Image 0 Base Address Register 00000000 The conÞgured value is written into the VSI0_BS register of the Universe chip VMEbus Slave Image 0 Bound Address Register Local DRAM Size The conÞgured value is written into the VSI0_BD register of the Universe chip The value is the same as the Lo...

Page 163: ... value is written into the VSI2_BS register of the Universe chip VMEbus Slave Image 2 Bound Address Register 00000000 The conÞgured value is written into the VSI2_BD register of the Universe chip VMEbus Slave Image 2 Translation Offset 00000000 The conÞgured value is written into the VSI2_TO register of the Universe chip VMEbus Slave Image 3 Control 00000000 The conÞgured value is written into the...

Page 164: ...ve Image Register 00000000 The conÞgured value is written into the SLSI register of the Universe chip Master Control Register 80C00000 The conÞgured value is written into the MAST_CTL register of the Universe chip Miscellaneous Control Register 52060000 The conÞgured value is written into the MISC_CTL register of the Universe chip User AM Codes 00000000 The conÞgured value is written into the USER...

Page 165: ...sion of a manual a supplement bears the same number as the manual but has a suffix such as Ò xx2A1Ó the first supplement to the second revision of the manual Table A 1 Motorola Computer Group Documents Document Title Publication Number MVME2600 Series Single Board Computer Installation and Use V2600A IH MVME2600 Series Single Board Computer ProgrammerÕs Reference Guide V2600A PG PPCBug Firmware Pa...

Page 166: ...rce Publication Number PowerPC 603TM RISC Microprocessor Technical Summary Literature Distribution Center for Motorola Telephone 800 441 2447 FAX 602 994 6430 or 303 675 2150 E mail ldcformotorola hibbertco com MPC603 D PowerPC 603TM RISC Microprocessor UserÕs Manual Literature Distribution Center for Motorola Telephone 800 441 2447 FAX 602 994 6430 or 303 675 2150 E mail ldcformotorola hibbertco ...

Page 167: ...g Environments Literature Distribution Center for Motorola Telephone 800 441 2447 FAX 602 994 6430 or 303 675 2150 E mail ldcformotorola hibbertco com OR IBM Microelectronics Mail Stop A25 862 1 PowerPC Marketing 1000 River Street Essex Junction Vermont 05452 4299 Telephone 1 800 PowerPC Telephone 1 800 769 3772 FAX 1 800 POWERfax FAX 1 800 769 3732 MPCFPE AD MPRPPCFPE 01 MPC2604GA Integrated Seco...

Page 168: ...ve P O Box 58090 Santa Clara California 95052 8090 Telephone 1 800 272 9959 PC87308VUL MK48T59 CMOS 8K x 8 TIMEKEEPERTM SRAM Data Sheet SGS Thomson Microelectronics Group Marketing Headquarters or nearest Sales OfÞce 1000 East Bell Road Phoenix Arizona 85022 Telephone 602 867 6100 M48T59 SYM 53CXX was NCR 53C8XX Family PCI SCSI I O Processors Programming Guide Symbios Logic Inc 1731 Technology Dri...

Page 169: ...CI Arbiter PIB Winbond Electronics Corporation Winbond Systems Laboratory 2730 Orchard Parkway San Jose CA 95134 Telephone 1 408 943 6666 FAX 1 408 943 6668 W83C553 Universe User Manual Tundra Semiconductor Corporation 603 March Road Kanata ON K2K 2M5 Canada Telephone 1 800 267 7231 Telephone 613 592 1320 OR 695 High Glen Drive San Jose California 95133 USA Telephone 408 258 3600 FAX 408 258 3659 ...

Page 170: ...ness Way East Englewood CO 80112 5704 Telephone 1 800 854 7179 Telephone 303 792 2181 X3 131 1990 VME64 SpeciÞcation VITA VMEbus International Trade Association 7825 E Gelding Drive Suite 104 Scottsdale Arizona 85260 3415 Telephone 602 951 8866 FAX 602 951 0720 NOTE An earlier version of this speciÞcation is available as Versatile Backplane Bus VMEbus Institute of Electrical and Electronics Engine...

Page 171: ...21633 Telephone 1 800 678 4333 P1386 1 Draft 2 0 Bidirectional Parallel Port Interface SpeciÞcation Institute of Electrical and Electronics Engineers Inc Publication and Sales Department 345 East 47th Street New York New York 10017 21633 Telephone 1 800 678 4333 IEEE Standard 1284 Peripheral Component Interconnect PCI Local Bus SpeciÞcation Revision 2 1 PCI Special Interest Group 2575 NE Kathryn S...

Page 172: ...533 6531 Telephone 800 PowerPC OR Morgan Kaufmann Publishers Inc 340 Pine Street Sixth Floor San Francisco CA 94104 3205 USA Telephone 415 392 2665 FAX 415 982 2665 TB338 D MPRPPCHRP 01 ISBN 1 55860 394 8 PowerPC Reference Platform PRP SpeciÞcation Third Edition Version 1 0 Volumes I and II International Business Machines Corporation Power Personal Systems Architecture 11400 Burnet Rd Austin TX 78...

Page 173: ...h Collision Detection CSMA CD Access Method and Physical Layer SpeciÞcations Global Engineering Documents 15 Inverness Way East Englewood CO 80112 5704 Telephone 1 800 854 7179 Telephone 303 792 2181 This document can also be obtained through the national standards body of member countries ISO IEC 8802 3 Interface Between Data Terminal Equipment and Data Circuit Terminating Equipment Employing Ser...

Page 174: ...Related Specifications A 10 A ...

Page 175: ...eciÞcations Power requirements Excluding transition module keyboard mouse 5Vdc 5 5A typical 7A maximum MPC603 processor 6A typical 8A maximum MPC604 processor 12Vdc 5 250mA typical 1A maximum Ð12Vdc 5 100mA typical 250mA maximum Operating temperature 0ûC to 55ûC entry air with forced air cooling refer to Cooling Requirements section Storage temperature Ð40ûC to 85û C Relative humidity 5 to 90 non ...

Page 176: ...sembly and the card cage where the incoming airstream first encounters the module under test Test software is executed as the module is subjected to ambient temperature variations Case temperatures of critical high power density integrated circuits are monitored to ensure component vendorsÕ specifications are not exceeded While the exact amount of airflow required for cooling depends on the ambien...

Page 177: ...ternal I O ports Cable shields connected to earth ground via metal shell connectors bonded to a conductive module front panel Conductive chassis rails connected to earth ground This provides the path for connecting shields to earth ground Front panel screws properly tightened For minimum RF emissions it is essential that the conditions above be implemented Failure to do so could compromise the FCC...

Page 178: ...FCC Compliance B 4 B ...

Page 179: ...e routed through P2 and the associated transition module The TTL level signals from the ISASIO chip are buffered through TTL drivers and series resistors then routed through EIA 232 D drivers and receivers to complete the asynchronous serial interface enroute to the MVME712M transition module The MVME2603 2604 hardware supports asynchronous serial baud rates of 110B s to 38 4KB s For detailed prog...

Page 180: ...gle ended signaling and is generally used with DB25 connectors although other connector styles e g DB9 and RJ45 are sometimes used as well Table C 1 lists the standard EIA 232 D interconnections Not all pins listed in the table are necessary in every application To interpret the information correctly remember that the EIA 232 D serial interface was developed to connect a terminal to a modem Serial...

Page 181: ... data 7 SG Signal Ground Common return line for all signals at the modem interface 8 DCD Data Carrier Detect Output from modem to terminal to indicate that a valid carrier is being received 9 14 Not used 15 TxC Transmit Clock DCE Output from modem to terminal clocks data from the terminal to the modem 16 Not used 17 RxC Receive Clock Output from terminal to modem clocks input data from the termina...

Page 182: ...ansmitter and receiver parameters applicable to the MVME2603 2604 are listed in the following tables The MVME2603 2604 conforms to EIA 232 D specifications Note that although the EIA 232 D standard recommends the use of short interconnection cables not more than 50 feet 15m in length longer Table C 2 EIA 232 D Interface Transmitter Characteristics Parameter Value Unit Minimum Maximum Output voltag...

Page 183: ...table to balanced double ended as well as unbalanced single ended signaling and offers the possibility of higher data rates than EIA 232 D with the same DB25 connector Table C 4 lists the EIA 530 interconnections that are available at MVME761 serial ports 3 and 4 J7 and J8 on the board surface when those ports are configured via serial interface modules as EIA 530 DCE or DTE ports Table C 3 EIA 23...

Page 184: ...t from DCE to DTE to indicate that valid data is being transferred to the DTE on the RxD line 11 TxCO_B Transmit Signal Element TimingÑDTE B Control signal that clocks output data 12 TxC_B Transmit Signal Element TimingÑDCE B Control signal that clocks input data 13 CTS_B Clear to Send B Input to DTE from DCE to indicate that message transmission can begin 14 TxD_B Transmit Data B Data to be trans...

Page 185: ...E to DCE indicating that the DTE is ready to send or receive data 24 TxCO_A Transmit Signal Element TimingÑDTE A Control signal that clocks output data 25 TM_A Test Mode A Indicates whether the local DCE is under test In DTE conÞguration ignored In DCE conÞguration always tied inactive and driven false Table C 4 MVME761 EIA 530 Interconnect Signals Continued Pin Number Signal Mnemonic Signal Name ...

Page 186: ...signal conductor and circuit ground at the load end of the cable with a 50Ω resistor substituted for the transmitter It is necessary to minimize interference with other signals Inversion of signals may be required e g plus polarity MARK to minus polarity MARK may be achieved by inverting the cable pair EIA 530 interface transmitter and receiver parameters applicable to the MVME2603 2604 are listed...

Page 187: ... several amperes of current could result This condition may not only be dangerous for the small wires in a typical cable but may also produce electrical noise that causes errors in data transmission That is why Table C 1 and Table C 4 show no connection for pin 1 Normally pin 7 signal ground should only be connected to the chassis ground at one point if several terminals are used with one computer...

Page 188: ...Proper Grounding C 10 C ...

Page 189: ...al A If the FUS or CPU LED is not lit the board may not be getting correct power 1 Make sure the system is plugged in 2 Check that the board is securely installed in its backplane or chassis 3 Check that all necessary cables are connected to the board per this manual 4 Check for compliance with System Considerations per this manual 5 Review the Installation and Startup procedures per this manual T...

Page 190: ...stem 2 Check that the proper debugger EPROM or debugger Flash memory is installed per this manual 3 Reconnect power 4 Restart the system by pressing the RESET switch 5 If the debug prompt appears go to step IV or step V as indicated If the debug prompt does not appear go to step VI B The board may need to be reset IV Debug prompt PPC1 Bug appears at powerup but the board does not autoboot A The in...

Page 191: ...g command see your board Debugger Manual to change clock speed and or Ethernet Address and then later return to env CR and step 3 7 Run the selftests by typing in st CR The tests take as much as 10 minutes depending on RAM size They are complete when the prompt returns The onboard selftest is a valuable tool in isolating defects 8 The system may indicate that it has passed all the selftests Or it ...

Page 192: ...eps are required VI The board has failed one or more of the tests listed above and cannot be corrected using the steps given A There may be some fault in the board hardware or the on board debugging and diagnostic Þrmware 1 Document the problem and return the board for service 2 Phone 1 800 222 5640 TROUBLESHOOTING PROCEDURE COMPLETE Table D 1 Troubleshooting MVME2603 2604 Boards Continued Conditi...

Page 193: ...elded twisted pair UTP of wires capable of carrying data at 10 Mbps for a maximum distance of 185 meters Also known as twisted pair Ethernet 100Base TX An Ethernet implementation in which the physical medium is an unshielded twisted pair UTP of wires capable of carrying data at 100 Mbps for a maximum distance of 100 meters Also known as fast Ethernet ACIA Asynchronous Communications Interface Adap...

Page 194: ...Lock Transfer A type of graphics drawing routine that moves a rectangle of data from one area of display memory to another The data need not have any particular alignment BLT BLock Transfer board The term more commonly used to refer to a PCB printed circuit board Basically a flat board made of nonconducting material such as plastic or fiberglass on which chips and other electronic components are m...

Page 195: ...Computer A computer whose processor is designed to sequentially run variable length instructions many of which require several clock cycles that perform complex tasks and thereby simplify programming CODEC COder DECoder Color Difference CD The signals of R Y and B Y without the luminance Y signal The Green signals G Y can be extracted by these two signals Common Hardware Reference Platform CHRP A ...

Page 196: ...inal Equipment ECC Error Correction Code ECP Extended Capability Port EEPROM Electrically Erasable Programmable Read Only Memory A memory storage device that can be written repeatedly with no special erasure fixture EEPROMs do not lose their contents when they are powered down EISA bus Extended Industry Standard Architecture bus IBM An architectural system using a 32 bit bus that allows data to be...

Page 197: ...eiving device can accept it The sending and receiving devices typically operate asynchronously firmware The program or specific software instructions that have been more or less permanently burned into an electronic component such as a ROM read only memory or an EPROM erasable programmable read only memory frame One complete television picture frame consists of 525 horizontal lines with the NTSC s...

Page 198: ...interlaced system of the same resolution This results in less costly hardware and may also make it possible to display a resolution that would otherwise be impossible on given hardware The disadvantage of an interlaced system is flicker especially when displaying objects that are only a few scanlines high IQ Signals Similar to the color difference signals R Y B Y but using different vector axis fo...

Page 199: ...r the PowerPC 603 microprocessor MPC604 MotorolaÕs component designation for the PowerPC 604 microprocessor MPIC Multi Processor Interrupt Controller MPU MicroProcessing Unit MTBF Mean Time Between Failures A statistical term relating to reliability as expressed in power on hours poh It was originally developed for the military and can be calculated several different ways yielding substantially di...

Page 200: ...available on the screen not necessarily simultaneously For VGA this is either 16 or 256 simultaneous colors out of 262 144 parallel port A connector that can exchange data with an I O device eight bits at a time This port is more commonly used for the connection of a printer to a system PCI local bus Peripheral Component Interconnect local bus Intel A high performance 32 bit internal interconnect ...

Page 201: ...nt units and floating point units where they can execute concurrently but finish out of order PowerPC is used by Motorola Inc under license from IBM PowerPC 601 The first implementation of the PowerPC family of microprocessors This CPU incorporates a memory management unit with a 256 entry buffer and a 32KB unified instruction and data cache It provides a 64 bit data bus and a separate 32 bit addr...

Page 202: ...Memory PS 2 Personal System 2 IBM QFP Quad Flat Package RAM Random Access Memory The temporary memory that a computer uses to hold the instructions and data currently being worked with All data in RAM is lost when the computer is turned off RAS Row Address Strobe A clock signal used in dynamic RAMs to control the input of the row addresses Raven The PowerPC to PCI local bus bridge chip developed b...

Page 203: ... bit bus Wide SCSI provides up to 40 Mbps data transfer on a 16 or 32 bit bus serial port A connector that can exchange data with an I O device one bit at a time It may operate synchronously or asynchronously and may include start bits stop bits and or parity SIM Serial Interface Module SIMM Single Inline Memory Module A small circuit board with RAM chips normally surface mounted that is designed ...

Page 204: ...800 x 600 pixels Teletext One way broadcast of digital information The digital information is injected in the broadcast TV signal VBI or full field The transmission medium could be satellite microwave cable etc The display medium is a regular TV receiver thick Ethernet See 10Base 5 thin Ethernet See 10Base 2 twisted pair Ethernet See 10Base T UART Universal Asynchronous Receiver Transmitter Univer...

Page 205: ...en the power supply is disconnected VRAM Video Dynamic Random Access Memory Memory chips with two ports one used for random accesses and the other capable of serial accesses Once the serial port has been initialized with a transfer cycle it can operate independently of the random port This frees the random port for CPU accesses The result of adding the serial port is a significantly reduced amount...

Page 206: ...Glossary GL 14 G L O S S A R Y ...

Page 207: ...ation base board serial port 1 9 1 11 1 12 1 13 configuration I O 1 3 1 15 1 25 configuration transition module serial port 1 17 1 27 configure PPC1Bug parameters 6 3 VMEbus interface 6 12 Configure Board Information Block CNFG 6 2 connector pin assignments 4 1 control status registers 1 51 cooling requirements B 2 counters 3 14 D data circuit terminating equipment DCE C 2 data terminal equipment ...

Page 208: ... considerations 1 51 interconnect signals 4 1 interconnections serial C 2 C 5 interface Ethernet 3 7 keyboard mouse 3 12 4 10 parallel 3 11 PCI bus 3 8 SCSI 3 6 serial 3 11 3 15 C 1 VMEbus 3 9 interrupt architecture MVME2603 2604 2 11 interrupt signals 3 18 interrupt support 2 10 ISA bus 2 2 2 9 2 10 3 11 3 14 3 18 ISA Super I O device ISASIO 3 9 J jumper headers MVME2603 2604 base board 1 6 MVME7...

Page 209: ... the system 2 3 2 12 3 19 restart mode 5 8 RF emissions B 3 ROMboot enable 6 8 6 11 6 12 ROMFAL 6 11 ROMNAL 6 11 S SCSI cabling 1 45 interface 3 6 termination 3 6 terminator power 1 52 3 20 3 21 SCSI bus 6 5 serial communications interface 3 15 C 1 serial interface 3 11 serial interface modules SIMs 3 25 serial interface parameters C 4 serial port configuration base board 1 9 1 11 1 12 1 13 serial...

Page 210: ...IN 4 I N D E X uppercase 5 8 using the board 1 4 V VME64 bus extension 3 6 VMEbus address data configurations 1 51 Universe ASIC and 3 9 VMEbus interface 6 12 W Winbond PCI ISA bus bridge controller 2 9 3 12 ...

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