5 I/O signals to CPU module
QE81WH4W
Chapter 5: I/O signals to CPU module
5.1 List of I/O signals
I/O signals of QE81WH4W are listed in Table 5.1-1
Table 5.1-1 List of I/O signals
Input signal (signal direction from QE81WH4W to CPU
module)
Output signal (signal direction from CPU module to
QE81WH4W)
Device #
Signal name
Device #
Signal name
Xn0
Module ready
Yn0 Use
prohibited
*1
Xn1
Periodic electric energy 1 data
completion flag
Yn1
Periodic electric energy 1 measurement
flag
Xn2
Periodic electric energy 2 data
completion flag
Yn2
Periodic electric energy 2 measurement
flag
Xn3
Periodic electric energy 1 reset
completion flag
Yn3
Periodic electric energy 1 reset request
Xn4
Periodic electric energy 2 reset
completion flag
Yn4
Periodic electric energy 2 reset request
Xn5 Use
prohibited
*1
Yn5 Use
prohibited
*1
Xn6 Use
prohibited
*1
Yn6 Use
prohibited
*1
Xn7 Use
prohibited
*1
Yn7 Use
prohibited
*1
Xn8
Data acquisition clock
Yn8
Use prohibited
*1
Xn9
Operating condition setting
completion flag
Yn9
Operating condition setting request
XnA
Alarm 1 flag
YnA
Alarm 1 reset request
XnB
Alarm 2 flag
YnB
Alarm 2 reset request
XnC
Integrated valve set completion flag
YnC
Integrated valve set request
XnD
Max./min. values clear completion flag
YnD
Max./min. values clear request
XnE Use
prohibited
*1
YnE Use
prohibited
*1
XnF Error
flag
YnF Error
clear
request
Point
*1 These signals cannot be used by the user since they are for system use
only. If these are set to on or off by the sequence program, the performance
of the QE81WH4W cannot be guaranteed.
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