111
8575
8575
A N/B Maintenance
A N/B Maintenance
5.5 PCI1410GGU PCMCIA Controller
16-Bit PC Card Interface Control (Slots A and B)
Name I/O
Description
BVD1
(STSCHG#/RI#)
I
Battery voltage detect 1. BVD1 is generated by 16-bit memory PC Cards
that include batteries. BVD1 is used with BVD2 as an indication of the
condition of the batteries on a memory PC Card. Both BVD1 and BVD2 are
high when the battery is good. When BVD2 is low and BVD1 is high, the
battery is weak and should be replaced. When BVD1 is low, the battery is
no longer serviceable and the data in the memory PC Card is lost.
Status change. STSCHG# is used to alert the system to a change in the
READY, write protect, or battery voltage dead condition of a 16-bit I/O PC
Card.
Ring indicate. RI is used by 16-bit modem cards to indicate a ring detection.
BVD2
(SPKR#)
I
Battery voltage detect 2. BVD2 is generated by 16-bit memory PC Cards
that include batteries. BVD2 is used with BVD1 as an indication of the
condition of the batteries on a memory PC Card. Both BVD1 and BVD2 are
high when the battery is good. When BVD2 is low and BVD1 is high, the
battery is weak and should be replaced. When BVD1 is low, the battery is
no longer serviceable and the data in the memory PC Card is lost.
Speaker. SPKR# is an optional binary audio signal available only when the
card and socket have been configured for the 16-bit I/O interface. The audio
signals from cards A and B are combined by the PCI1410 and are output on
SPKROUT. DMA request. BVD2 can be used as the DMA request signal
during DMA operations to a 16-bit PC Card that supports DMA. The PC
Card asserts BVD2 to indicate a request for a DMA operation.
CD1#
CD2#
I
Card detect 1 and Card detect 2. CD1# and CD2# are internally connected
to ground on the PC Card. When a PC Card is inserted into a socket, CD1#
and CD2# are pulled low.
CE1#
CE2#
O
Card enable 1 and card enable 2. CE1# and CE2# enable even- and
odd-numbered address bytes. CE1# enables even-numbered address bytes,
and CE2# enables odd-numbered address bytes.
INPACK#
I
Input acknowledge. INPACK# is asserted by the PC Card when it can
respond to an I/O read cycle at the current address.
DMA request. INPACK# can be used as the DMA request signal during
DMA operations from a 16-bit PC Card that supports DMA. If it is used as
a strobe, then the PC Card asserts this signal to indicate a request for a
DMA operation.
IORD#
O
I/O read. IORD# is asserted by the PCI1410 to enable 16-bit I/O PC Card
data output during host I/O read cycles.
DMA write. IORD# is used as the DMA write strobe during DMA
operations from a 16-bit PC Card that supports DMA. The PCI1410 asserts
IORD# during DMA transfers from the PC Card to host memory.
IOWR#
O
I/O write. IOWR# is driven low by the PCI1410 to strobe write data into
16-bit I/O PC Cards during host I/O write cycles.
DMA read. IOWR# is used as the DMA write strobe during DMA
operations from a 16-bit PC Card that supports DMA. The PCI1410 asserts
IOWR# during transfers from host memory to the PC Card.
Name I/O
Description
OE#
O
Output enable. OE# is driven low by the PCI1410 to enable 16-bit memory PC
Card data output during host memory read cycles.
DMA terminal count. OE# is used as terminal count (TC) during DMA
operations to a 16-bit PC Card that supports DMA. The PCI1410 asserts OE# to
indicate TC for a DMA write operation.
READY
(IREQ#)
I
Ready. The ready function is provided by READY when the 16-bit PC Card and
the host socket are configured for the memory-only interface. READY is driven
low by the 16-bit memory PC Cards to indicate that the memory card circuits are
busy processing a previous write command. READY is driven high when the
16-bit memory PC Card is ready to accept a new data transfer command.
Interrupt request. IREQ# is asserted by a 16-bit I/O PC Card to indicate to the
host that a device on the 16-bit I /O PC Card requires service by the host
software. IREQ# is high (deasserted) when no interrupt is requested.
REG#
O
Attribute memory select. REG# remains high for all common memory accesses.
When REG# is asserted, access is limited to attribute memory (OE# or WE#
active) and to the I/O space (IORD# or IOWR# active). Attribute memory is a
separately accessed section of card memory and is generally used to record card
capacity and other configuration and attribute information.
DMA acknowledge. REG# is used as a DMA acknowledge (DACK#) during
DMA operations to a 16-bit PC Card that supports DMA. The PCI1410 asserts
REG to indicate a DMA operation. REG# is used in conjunction with the DMA
read (IOWR#) or DMA write (IORD#) strobes to transfer data.
RESET
O
PC Card reset. RESET forces a hard reset to a 16-bit PC Card.
WAIT#
I
Bus cycle wait. WAIT# is driven by a 16-bit PC Card to extend the completion of
the memory or I/O cycle in progress.
WE#
O
Write enable. WE# is used to strobe memory write data into 16-bit memory PC
Cards. WE# is also used for memory PC Cards that employ programmable
memory technologies.
DMA terminal count. WE# is used as TC# during DMA operations to a 16-bit PC
Card that supports DMA. The PCI1410 asserts WE# to indicate TC# for a DMA
read operation.
WP
(IOIS16#)
I
Write protect. WP applies to 16-bit memory PC Cards. WP reflects the status of
the write-protect switch on 16-bit memory PC Cards. For 16-bit I/O cards, WP is
used for the 16-bit port (IOIS16#) function.
I/O is 16 bits. IOIS16# applies to 16-bit I/O PC Cards. IOIS16# is asserted by the
16-bit PC Card when the address on the bus corresponds to an address to which
the 16-bit PC Card responds, and the I/O port that is addressed is capable of
16-bit accesses.
DMA request. WP can be used as the DMA request signal during DMA
operations to a 16-bit PC Card that supports DMA. If used, then the PC Card
asserts WP to indicate a request for a DMA operation.
VS1#
VS2#
I/O
Voltage sense 1 and voltage sense 2. VS1# and VS2#, when used in conjunction
with each other, determine the operating voltage of the PC Card.
